Handle load/store of misaligned vectors that are the

[oota-llvm.git] / lib / CodeGen / SimpleRegisterCoalescing.cpp

diff --git a/lib/CodeGen/SimpleRegisterCoalescing.cpp b/lib/CodeGen/SimpleRegisterCoalescing.cpp
index 7c512ed368a8669d088ceb64c8daa984987caf96..f015ad5c1f391d35820b1bbde76e3fcba358673d 100644 (file)
--- a/lib/CodeGen/SimpleRegisterCoalescing.cpp
+++ b/lib/CodeGen/SimpleRegisterCoalescing.cpp
@@ -55,7 +55,11 @@ namespace {
 
   static cl::opt<bool>
   CommuteDef("coalescer-commute-instrs",
-             cl::init(false), cl::Hidden);
+             cl::init(true), cl::Hidden);
+
+  static cl::opt<int>
+  CommuteLimit("commute-limit",
+               cl::init(-1), cl::Hidden);
 
   RegisterPass<SimpleRegisterCoalescing> 
   X("simple-register-coalescing", "Simple Register Coalescing");
@@ -289,6 +293,9 @@ bool SimpleRegisterCoalescing::RemoveCopyByCommutingDef(LiveInterval &IntA,
   if (HasOtherReachingDefs(IntA, IntB, AValNo, BValNo))
     return false;
 
+  if (CommuteLimit >= 0 && numCommutes >= (unsigned)CommuteLimit)
+    return false;
+
   // At this point we have decided that it is legal to do this
   // transformation.  Start by commuting the instruction.
   MachineBasicBlock *MBB = DefMI->getParent();
@@ -450,8 +457,14 @@ SimpleRegisterCoalescing::UpdateRegDefsUses(unsigned SrcReg, unsigned DstReg,
       O.setSubReg(0);
     } else {
       unsigned OldSubIdx = O.getSubReg();
-      assert((!SubIdx || !OldSubIdx) && "Conflicting sub-register index!");
-      if (SubIdx)
+      // Sub-register indexes goes from small to large. e.g.
+      // RAX: 0 -> AL, 1 -> AH, 2 -> AX, 3 -> EAX
+      // EAX: 0 -> AL, 1 -> AH, 2 -> AX
+      // So RAX's sub-register 2 is AX, RAX's sub-regsiter 3 is EAX, whose
+      // sub-register 2 is also AX.
+      if (SubIdx && OldSubIdx && SubIdx != OldSubIdx)
+        assert(OldSubIdx < SubIdx && "Conflicting sub-register index!");
+      else if (SubIdx)
         O.setSubReg(SubIdx);
       O.setReg(DstReg);
     }