#define DEBUG_TYPE "isel"
#include "llvm/CodeGen/SelectionDAGISel.h"
+#include "llvm/CallingConv.h"
#include "llvm/Constants.h"
#include "llvm/DerivedTypes.h"
#include "llvm/Function.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CodeGen/SSARegMap.h"
+#include "llvm/Target/MRegisterInfo.h"
#include "llvm/Target/TargetData.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetLowering.h"
#include "llvm/Target/TargetMachine.h"
+#include "llvm/Transforms/Utils/BasicBlockUtils.h"
#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/MathExtras.h"
#include "llvm/Support/Debug.h"
#include <map>
#include <iostream>
using namespace llvm;
-#ifndef _NDEBUG
+#ifndef NDEBUG
static cl::opt<bool>
ViewDAGs("view-isel-dags", cl::Hidden,
cl::desc("Pop up a window to show isel dags as they are selected"));
#else
-static const bool ViewDAGS = 0;
+static const bool ViewDAGs = 0;
#endif
namespace llvm {
/// anywhere in the function.
std::map<const AllocaInst*, int> StaticAllocaMap;
- /// BlockLocalArguments - If any arguments are only used in a single basic
- /// block, and if the target can access the arguments without side-effects,
- /// avoid emitting CopyToReg nodes for those arguments. This map keeps
- /// track of which arguments are local to each BB.
- std::multimap<BasicBlock*, std::pair<Argument*,
- unsigned> > BlockLocalArguments;
-
-
unsigned MakeReg(MVT::ValueType VT) {
return RegMap->createVirtualRegister(TLI.getRegClassFor(VT));
}
return false;
}
+/// isOnlyUsedInEntryBlock - If the specified argument is only used in the
+/// entry block, return true.
+static bool isOnlyUsedInEntryBlock(Argument *A) {
+ BasicBlock *Entry = A->getParent()->begin();
+ for (Value::use_iterator UI = A->use_begin(), E = A->use_end(); UI != E; ++UI)
+ if (cast<Instruction>(*UI)->getParent() != Entry)
+ return false; // Use not in entry block.
+ return true;
+}
+
FunctionLoweringInfo::FunctionLoweringInfo(TargetLowering &tli,
Function &fn, MachineFunction &mf)
: TLI(tli), Fn(fn), MF(mf), RegMap(MF.getSSARegMap()) {
- // Initialize the mapping of values to registers. This is only set up for
- // instruction values that are used outside of the block that defines
- // them.
+ // Create a vreg for each argument register that is not dead and is used
+ // outside of the entry block for the function.
for (Function::arg_iterator AI = Fn.arg_begin(), E = Fn.arg_end();
AI != E; ++AI)
- InitializeRegForValue(AI);
+ if (!isOnlyUsedInEntryBlock(AI))
+ InitializeRegForValue(AI);
- Function::iterator BB = Fn.begin(), E = Fn.end();
+ // Initialize the mapping of values to registers. This is only set up for
+ // instruction values that are used outside of the block that defines
+ // them.
+ Function::iterator BB = Fn.begin(), EB = Fn.end();
for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I)
if (AllocaInst *AI = dyn_cast<AllocaInst>(I))
if (ConstantUInt *CUI = dyn_cast<ConstantUInt>(AI->getArraySize())) {
const Type *Ty = AI->getAllocatedType();
uint64_t TySize = TLI.getTargetData().getTypeSize(Ty);
- unsigned Align = TLI.getTargetData().getTypeAlignment(Ty);
+ unsigned Align =
+ std::max((unsigned)TLI.getTargetData().getTypeAlignment(Ty),
+ AI->getAlignment());
+
+ // If the alignment of the value is smaller than the size of the value,
+ // and if the size of the value is particularly small (<= 8 bytes),
+ // round up to the size of the value for potentially better performance.
+ //
+ // FIXME: This could be made better with a preferred alignment hook in
+ // TargetData. It serves primarily to 8-byte align doubles for X86.
+ if (Align < TySize && TySize <= 8) Align = TySize;
TySize *= CUI->getValue(); // Get total allocated size.
+ if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
StaticAllocaMap[AI] =
MF.getFrameInfo()->CreateStackObject((unsigned)TySize, Align);
}
- for (; BB != E; ++BB)
- for (BasicBlock::iterator I = BB->begin(), e = BB->end(); I != e; ++I)
+ for (; BB != EB; ++BB)
+ for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ++I)
if (!I->use_empty() && isUsedOutsideOfDefiningBlock(I))
if (!isa<AllocaInst>(I) ||
!StaticAllocaMap.count(cast<AllocaInst>(I)))
// Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
// also creates the initial PHI MachineInstrs, though none of the input
// operands are populated.
- for (Function::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) {
+ for (BB = Fn.begin(), EB = Fn.end(); BB != EB; ++BB) {
MachineBasicBlock *MBB = new MachineBasicBlock(BB);
MBBMap[BB] = MBB;
MF.getBasicBlockList().push_back(MBB);
FuncInfo.ValueMap.find(V);
assert(VMI != FuncInfo.ValueMap.end() && "Value not in map!");
- return N = DAG.getCopyFromReg(VMI->second, VT, DAG.getEntryNode());
+ unsigned InReg = VMI->second;
+
+ // If this type is not legal, make it so now.
+ MVT::ValueType DestVT = TLI.getTypeToTransformTo(VT);
+
+ N = DAG.getCopyFromReg(DAG.getEntryNode(), InReg, DestVT);
+ if (DestVT < VT) {
+ // Source must be expanded. This input value is actually coming from the
+ // register pair VMI->second and VMI->second+1.
+ N = DAG.getNode(ISD::BUILD_PAIR, VT, N,
+ DAG.getCopyFromReg(DAG.getEntryNode(), InReg+1, DestVT));
+ } else {
+ if (DestVT > VT) { // Promotion case
+ if (MVT::isFloatingPoint(VT))
+ N = DAG.getNode(ISD::FP_ROUND, VT, N);
+ else
+ N = DAG.getNode(ISD::TRUNCATE, VT, N);
+ }
+ }
+
+ return N;
}
const SDOperand &setValue(const Value *V, SDOperand NewN) {
void visitUnwind(UnwindInst &I) { assert(0 && "TODO"); }
//
- void visitBinary(User &I, unsigned Opcode);
- void visitAdd(User &I) { visitBinary(I, ISD::ADD); }
+ void visitBinary(User &I, unsigned Opcode, bool isShift = false);
+ void visitAdd(User &I) {
+ visitBinary(I, I.getType()->isFloatingPoint() ? ISD::FADD : ISD::ADD);
+ }
void visitSub(User &I);
- void visitMul(User &I) { visitBinary(I, ISD::MUL); }
+ void visitMul(User &I) {
+ visitBinary(I, I.getType()->isFloatingPoint() ? ISD::FMUL : ISD::MUL);
+ }
void visitDiv(User &I) {
- visitBinary(I, I.getType()->isUnsigned() ? ISD::UDIV : ISD::SDIV);
+ unsigned Opc;
+ const Type *Ty = I.getType();
+ if (Ty->isFloatingPoint())
+ Opc = ISD::FDIV;
+ else if (Ty->isUnsigned())
+ Opc = ISD::UDIV;
+ else
+ Opc = ISD::SDIV;
+ visitBinary(I, Opc);
}
void visitRem(User &I) {
- visitBinary(I, I.getType()->isUnsigned() ? ISD::UREM : ISD::SREM);
+ unsigned Opc;
+ const Type *Ty = I.getType();
+ if (Ty->isFloatingPoint())
+ Opc = ISD::FREM;
+ else if (Ty->isUnsigned())
+ Opc = ISD::UREM;
+ else
+ Opc = ISD::SREM;
+ visitBinary(I, Opc);
}
void visitAnd(User &I) { visitBinary(I, ISD::AND); }
void visitOr (User &I) { visitBinary(I, ISD::OR); }
void visitXor(User &I) { visitBinary(I, ISD::XOR); }
- void visitShl(User &I) { visitBinary(I, ISD::SHL); }
+ void visitShl(User &I) { visitBinary(I, ISD::SHL, true); }
void visitShr(User &I) {
- visitBinary(I, I.getType()->isUnsigned() ? ISD::SRL : ISD::SRA);
+ visitBinary(I, I.getType()->isUnsigned() ? ISD::SRL : ISD::SRA, true);
}
void visitSetCC(User &I, ISD::CondCode SignedOpc, ISD::CondCode UnsignedOpc);
void visitStore(StoreInst &I);
void visitPHI(PHINode &I) { } // PHI nodes are handled specially.
void visitCall(CallInst &I);
+ const char *visitIntrinsicCall(CallInst &I, unsigned Intrinsic);
void visitVAStart(CallInst &I);
- void visitVANext(VANextInst &I);
void visitVAArg(VAArgInst &I);
void visitVAEnd(CallInst &I);
void visitVACopy(CallInst &I);
Op1 = DAG.getNode(ISD::ZERO_EXTEND, TmpVT, Op1);
break;
case MVT::f32:
- // Extend float to double.
- Op1 = DAG.getNode(ISD::FP_EXTEND, MVT::f64, Op1);
- break;
case MVT::i64:
case MVT::f64:
break; // No extension needed!
}
-
- DAG.setRoot(DAG.getNode(ISD::RET, MVT::Other, getRoot(), Op1));
+ // Allow targets to lower this further to meet ABI requirements
+ DAG.setRoot(TLI.LowerReturnTo(getRoot(), Op1, DAG));
}
void SelectionDAGLowering::visitBr(BranchInst &I) {
void SelectionDAGLowering::visitSub(User &I) {
// -0.0 - X --> fneg
- if (ConstantFP *CFP = dyn_cast<ConstantFP>(I.getOperand(0)))
- if (CFP->isExactlyValue(-0.0)) {
- SDOperand Op2 = getValue(I.getOperand(1));
- setValue(&I, DAG.getNode(ISD::FNEG, Op2.getValueType(), Op2));
- return;
- }
-
- visitBinary(I, ISD::SUB);
+ if (I.getType()->isFloatingPoint()) {
+ if (ConstantFP *CFP = dyn_cast<ConstantFP>(I.getOperand(0)))
+ if (CFP->isExactlyValue(-0.0)) {
+ SDOperand Op2 = getValue(I.getOperand(1));
+ setValue(&I, DAG.getNode(ISD::FNEG, Op2.getValueType(), Op2));
+ return;
+ }
+ visitBinary(I, ISD::FSUB);
+ } else {
+ visitBinary(I, ISD::SUB);
+ }
}
-void SelectionDAGLowering::visitBinary(User &I, unsigned Opcode) {
+void SelectionDAGLowering::visitBinary(User &I, unsigned Opcode, bool isShift) {
SDOperand Op1 = getValue(I.getOperand(0));
SDOperand Op2 = getValue(I.getOperand(1));
- if (isa<ShiftInst>(I))
- Op2 = DAG.getNode(ISD::ZERO_EXTEND, TLI.getShiftAmountTy(), Op2);
+ if (isShift)
+ Op2 = DAG.getNode(ISD::ANY_EXTEND, TLI.getShiftAmountTy(), Op2);
setValue(&I, DAG.getNode(Opcode, Op1.getValueType(), Op1, Op2));
}
ISD::CondCode Opcode = SignedOpcode;
if (I.getOperand(0)->getType()->isUnsigned())
Opcode = UnsignedOpcode;
- setValue(&I, DAG.getSetCC(Opcode, MVT::i1, Op1, Op2));
+ setValue(&I, DAG.getSetCC(MVT::i1, Op1, Op2, Opcode));
}
void SelectionDAGLowering::visitSelect(User &I) {
// Cast to bool is a comparison against zero, not truncation to zero.
SDOperand Zero = isInteger(SrcTy) ? DAG.getConstant(0, N.getValueType()) :
DAG.getConstantFP(0.0, N.getValueType());
- setValue(&I, DAG.getSetCC(ISD::SETNE, MVT::i1, N, Zero));
+ setValue(&I, DAG.getSetCC(MVT::i1, N, Zero, ISD::SETNE));
} else if (isInteger(SrcTy)) {
if (isInteger(DestTy)) { // Int -> Int cast
if (DestTy < SrcTy) // Truncating cast?
Ty = StTy->getElementType(Field);
} else {
Ty = cast<SequentialType>(Ty)->getElementType();
- if (!isa<Constant>(Idx) || !cast<Constant>(Idx)->isNullValue()) {
- // N = N + Idx * ElementSize;
- uint64_t ElementSize = TD.getTypeSize(Ty);
- SDOperand IdxN = getValue(Idx), Scale = getIntPtrConstant(ElementSize);
-
- // If the index is smaller or larger than intptr_t, truncate or extend
- // it.
- if (IdxN.getValueType() < Scale.getValueType()) {
- if (Idx->getType()->isSigned())
- IdxN = DAG.getNode(ISD::SIGN_EXTEND, Scale.getValueType(), IdxN);
- else
- IdxN = DAG.getNode(ISD::ZERO_EXTEND, Scale.getValueType(), IdxN);
- } else if (IdxN.getValueType() > Scale.getValueType())
- IdxN = DAG.getNode(ISD::TRUNCATE, Scale.getValueType(), IdxN);
-
- IdxN = DAG.getNode(ISD::MUL, N.getValueType(), IdxN, Scale);
+
+ // If this is a constant subscript, handle it quickly.
+ if (ConstantInt *CI = dyn_cast<ConstantInt>(Idx)) {
+ if (CI->getRawValue() == 0) continue;
+
+ uint64_t Offs;
+ if (ConstantSInt *CSI = dyn_cast<ConstantSInt>(CI))
+ Offs = (int64_t)TD.getTypeSize(Ty)*CSI->getValue();
+ else
+ Offs = TD.getTypeSize(Ty)*cast<ConstantUInt>(CI)->getValue();
+ N = DAG.getNode(ISD::ADD, N.getValueType(), N, getIntPtrConstant(Offs));
+ continue;
+ }
+
+ // N = N + Idx * ElementSize;
+ uint64_t ElementSize = TD.getTypeSize(Ty);
+ SDOperand IdxN = getValue(Idx);
+
+ // If the index is smaller or larger than intptr_t, truncate or extend
+ // it.
+ if (IdxN.getValueType() < N.getValueType()) {
+ if (Idx->getType()->isSigned())
+ IdxN = DAG.getNode(ISD::SIGN_EXTEND, N.getValueType(), IdxN);
+ else
+ IdxN = DAG.getNode(ISD::ZERO_EXTEND, N.getValueType(), IdxN);
+ } else if (IdxN.getValueType() > N.getValueType())
+ IdxN = DAG.getNode(ISD::TRUNCATE, N.getValueType(), IdxN);
+
+ // If this is a multiply by a power of two, turn it into a shl
+ // immediately. This is a very common case.
+ if (isPowerOf2_64(ElementSize)) {
+ unsigned Amt = Log2_64(ElementSize);
+ IdxN = DAG.getNode(ISD::SHL, N.getValueType(), IdxN,
+ DAG.getConstant(Amt, TLI.getShiftAmountTy()));
N = DAG.getNode(ISD::ADD, N.getValueType(), N, IdxN);
+ continue;
}
+
+ SDOperand Scale = getIntPtrConstant(ElementSize);
+ IdxN = DAG.getNode(ISD::MUL, N.getValueType(), IdxN, Scale);
+ N = DAG.getNode(ISD::ADD, N.getValueType(), N, IdxN);
}
}
setValue(&I, N);
const Type *Ty = I.getAllocatedType();
uint64_t TySize = TLI.getTargetData().getTypeSize(Ty);
- unsigned Align = TLI.getTargetData().getTypeAlignment(Ty);
+ unsigned Align = std::max((unsigned)TLI.getTargetData().getTypeAlignment(Ty),
+ I.getAlignment());
SDOperand AllocSize = getValue(I.getArraySize());
MVT::ValueType IntPtr = TLI.getPointerTy();
getIntPtrConstant(~(uint64_t)(StackAlign-1)));
}
- SDOperand DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, AllocSize.getValueType(),
- getRoot(), AllocSize,
- getIntPtrConstant(Align));
+ std::vector<MVT::ValueType> VTs;
+ VTs.push_back(AllocSize.getValueType());
+ VTs.push_back(MVT::Other);
+ std::vector<SDOperand> Ops;
+ Ops.push_back(getRoot());
+ Ops.push_back(AllocSize);
+ Ops.push_back(getIntPtrConstant(Align));
+ SDOperand DSA = DAG.getNode(ISD::DYNAMIC_STACKALLOC, VTs, Ops);
DAG.setRoot(setValue(&I, DSA).getValue(1));
// Inform the Frame Information that we have just allocated a variable-sized
DAG.getSrcValue(I.getOperand(1))));
}
+/// visitIntrinsicCall - Lower the call to the specified intrinsic function. If
+/// we want to emit this as a call to a named external function, return the name
+/// otherwise lower it and return null.
+const char *
+SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
+ switch (Intrinsic) {
+ case Intrinsic::vastart: visitVAStart(I); return 0;
+ case Intrinsic::vaend: visitVAEnd(I); return 0;
+ case Intrinsic::vacopy: visitVACopy(I); return 0;
+ case Intrinsic::returnaddress: visitFrameReturnAddress(I, false); return 0;
+ case Intrinsic::frameaddress: visitFrameReturnAddress(I, true); return 0;
+ case Intrinsic::setjmp:
+ return "_setjmp"+!TLI.usesUnderscoreSetJmpLongJmp();
+ break;
+ case Intrinsic::longjmp:
+ return "_longjmp"+!TLI.usesUnderscoreSetJmpLongJmp();
+ break;
+ case Intrinsic::memcpy: visitMemIntrinsic(I, ISD::MEMCPY); return 0;
+ case Intrinsic::memset: visitMemIntrinsic(I, ISD::MEMSET); return 0;
+ case Intrinsic::memmove: visitMemIntrinsic(I, ISD::MEMMOVE); return 0;
+
+ case Intrinsic::readport:
+ case Intrinsic::readio: {
+ std::vector<MVT::ValueType> VTs;
+ VTs.push_back(TLI.getValueType(I.getType()));
+ VTs.push_back(MVT::Other);
+ std::vector<SDOperand> Ops;
+ Ops.push_back(getRoot());
+ Ops.push_back(getValue(I.getOperand(1)));
+ SDOperand Tmp = DAG.getNode(Intrinsic == Intrinsic::readport ?
+ ISD::READPORT : ISD::READIO, VTs, Ops);
+
+ setValue(&I, Tmp);
+ DAG.setRoot(Tmp.getValue(1));
+ return 0;
+ }
+ case Intrinsic::writeport:
+ case Intrinsic::writeio:
+ DAG.setRoot(DAG.getNode(Intrinsic == Intrinsic::writeport ?
+ ISD::WRITEPORT : ISD::WRITEIO, MVT::Other,
+ getRoot(), getValue(I.getOperand(1)),
+ getValue(I.getOperand(2))));
+ return 0;
+ case Intrinsic::dbg_stoppoint:
+ case Intrinsic::dbg_region_start:
+ case Intrinsic::dbg_region_end:
+ case Intrinsic::dbg_func_start:
+ case Intrinsic::dbg_declare:
+ if (I.getType() != Type::VoidTy)
+ setValue(&I, DAG.getNode(ISD::UNDEF, TLI.getValueType(I.getType())));
+ return 0;
+
+ case Intrinsic::isunordered:
+ setValue(&I, DAG.getSetCC(MVT::i1,getValue(I.getOperand(1)),
+ getValue(I.getOperand(2)), ISD::SETUO));
+ return 0;
+
+ case Intrinsic::sqrt:
+ setValue(&I, DAG.getNode(ISD::FSQRT,
+ getValue(I.getOperand(1)).getValueType(),
+ getValue(I.getOperand(1))));
+ return 0;
+ case Intrinsic::pcmarker: {
+ SDOperand Tmp = getValue(I.getOperand(1));
+ DAG.setRoot(DAG.getNode(ISD::PCMARKER, MVT::Other, getRoot(), Tmp));
+ return 0;
+ }
+ case Intrinsic::readcyclecounter:
+ setValue(&I, DAG.getNode(ISD::READCYCLECOUNTER, MVT::i64, getRoot()));
+ return 0;
+ case Intrinsic::cttz:
+ setValue(&I, DAG.getNode(ISD::CTTZ,
+ getValue(I.getOperand(1)).getValueType(),
+ getValue(I.getOperand(1))));
+ return 0;
+ case Intrinsic::ctlz:
+ setValue(&I, DAG.getNode(ISD::CTLZ,
+ getValue(I.getOperand(1)).getValueType(),
+ getValue(I.getOperand(1))));
+ return 0;
+ case Intrinsic::ctpop:
+ setValue(&I, DAG.getNode(ISD::CTPOP,
+ getValue(I.getOperand(1)).getValueType(),
+ getValue(I.getOperand(1))));
+ return 0;
+ default:
+ std::cerr << I;
+ assert(0 && "This intrinsic is not implemented yet!");
+ return 0;
+ }
+}
+
+
void SelectionDAGLowering::visitCall(CallInst &I) {
const char *RenameFn = 0;
- SDOperand Tmp;
- if (Function *F = I.getCalledFunction())
+ if (Function *F = I.getCalledFunction()) {
if (F->isExternal())
- switch (F->getIntrinsicID()) {
- case 0: // Not an LLVM intrinsic.
- if (F->getName() == "fabs" || F->getName() == "fabsf") {
+ if (unsigned IID = F->getIntrinsicID()) {
+ RenameFn = visitIntrinsicCall(I, IID);
+ if (!RenameFn)
+ return;
+ } else { // Not an LLVM intrinsic.
+ const std::string &Name = F->getName();
+ if (Name[0] == 'f' && (Name == "fabs" || Name == "fabsf")) {
if (I.getNumOperands() == 2 && // Basic sanity checks.
I.getOperand(1)->getType()->isFloatingPoint() &&
I.getType() == I.getOperand(1)->getType()) {
- Tmp = getValue(I.getOperand(1));
+ SDOperand Tmp = getValue(I.getOperand(1));
setValue(&I, DAG.getNode(ISD::FABS, Tmp.getValueType(), Tmp));
return;
}
- }
- else if (F->getName() == "sin" || F->getName() == "sinf") {
+ } else if (Name[0] == 's' && (Name == "sin" || Name == "sinf")) {
if (I.getNumOperands() == 2 && // Basic sanity checks.
I.getOperand(1)->getType()->isFloatingPoint() &&
I.getType() == I.getOperand(1)->getType()) {
- Tmp = getValue(I.getOperand(1));
+ SDOperand Tmp = getValue(I.getOperand(1));
setValue(&I, DAG.getNode(ISD::FSIN, Tmp.getValueType(), Tmp));
return;
}
- }
- else if (F->getName() == "cos" || F->getName() == "cosf") {
+ } else if (Name[0] == 'c' && (Name == "cos" || Name == "cosf")) {
if (I.getNumOperands() == 2 && // Basic sanity checks.
I.getOperand(1)->getType()->isFloatingPoint() &&
I.getType() == I.getOperand(1)->getType()) {
- Tmp = getValue(I.getOperand(1));
+ SDOperand Tmp = getValue(I.getOperand(1));
setValue(&I, DAG.getNode(ISD::FCOS, Tmp.getValueType(), Tmp));
return;
}
}
- break;
- case Intrinsic::vastart: visitVAStart(I); return;
- case Intrinsic::vaend: visitVAEnd(I); return;
- case Intrinsic::vacopy: visitVACopy(I); return;
- case Intrinsic::returnaddress: visitFrameReturnAddress(I, false); return;
- case Intrinsic::frameaddress: visitFrameReturnAddress(I, true); return;
-
- case Intrinsic::setjmp: RenameFn = "setjmp"; break;
- case Intrinsic::longjmp: RenameFn = "longjmp"; break;
- case Intrinsic::memcpy: visitMemIntrinsic(I, ISD::MEMCPY); return;
- case Intrinsic::memset: visitMemIntrinsic(I, ISD::MEMSET); return;
- case Intrinsic::memmove: visitMemIntrinsic(I, ISD::MEMMOVE); return;
-
- case Intrinsic::readport:
- case Intrinsic::readio:
- Tmp = DAG.getNode(F->getIntrinsicID() == Intrinsic::readport ?
- ISD::READPORT : ISD::READIO,
- TLI.getValueType(I.getType()), getRoot(),
- getValue(I.getOperand(1)));
- setValue(&I, Tmp);
- DAG.setRoot(Tmp.getValue(1));
- return;
- case Intrinsic::writeport:
- case Intrinsic::writeio:
- DAG.setRoot(DAG.getNode(F->getIntrinsicID() == Intrinsic::writeport ?
- ISD::WRITEPORT : ISD::WRITEIO, MVT::Other,
- getRoot(), getValue(I.getOperand(1)),
- getValue(I.getOperand(2))));
- return;
- case Intrinsic::dbg_stoppoint:
- case Intrinsic::dbg_region_start:
- case Intrinsic::dbg_region_end:
- case Intrinsic::dbg_func_start:
- case Intrinsic::dbg_declare:
- if (I.getType() != Type::VoidTy)
- setValue(&I, DAG.getNode(ISD::UNDEF, TLI.getValueType(I.getType())));
- return;
-
- case Intrinsic::isunordered:
- setValue(&I, DAG.getSetCC(ISD::SETUO, MVT::i1,getValue(I.getOperand(1)),
- getValue(I.getOperand(2))));
- return;
-
- case Intrinsic::sqrt:
- setValue(&I, DAG.getNode(ISD::FSQRT,
- getValue(I.getOperand(1)).getValueType(),
- getValue(I.getOperand(1))));
- return;
-
- case Intrinsic::pcmarker:
- Tmp = getValue(I.getOperand(1));
- DAG.setRoot(DAG.getNode(ISD::PCMARKER, MVT::Other, getRoot(), Tmp));
- return;
- case Intrinsic::cttz:
- setValue(&I, DAG.getNode(ISD::CTTZ,
- getValue(I.getOperand(1)).getValueType(),
- getValue(I.getOperand(1))));
- return;
- case Intrinsic::ctlz:
- setValue(&I, DAG.getNode(ISD::CTLZ,
- getValue(I.getOperand(1)).getValueType(),
- getValue(I.getOperand(1))));
- return;
- case Intrinsic::ctpop:
- setValue(&I, DAG.getNode(ISD::CTPOP,
- getValue(I.getOperand(1)).getValueType(),
- getValue(I.getOperand(1))));
- return;
- default:
- std::cerr << I;
- assert(0 && "This intrinsic is not implemented yet!");
- return;
}
+ }
SDOperand Callee;
if (!RenameFn)
else
Callee = DAG.getExternalSymbol(RenameFn, TLI.getPointerTy());
std::vector<std::pair<SDOperand, const Type*> > Args;
-
+ Args.reserve(I.getNumOperands());
for (unsigned i = 1, e = I.getNumOperands(); i != e; ++i) {
Value *Arg = I.getOperand(i);
SDOperand ArgNode = getValue(Arg);
const FunctionType *FTy = cast<FunctionType>(PT->getElementType());
std::pair<SDOperand,SDOperand> Result =
- TLI.LowerCallTo(getRoot(), I.getType(), FTy->isVarArg(), Callee, Args, DAG);
+ TLI.LowerCallTo(getRoot(), I.getType(), FTy->isVarArg(), I.getCallingConv(),
+ I.isTailCall(), Callee, Args, DAG);
if (I.getType() != Type::VoidTy)
setValue(&I, Result.first);
DAG.setRoot(Result.second);
Args.push_back(std::make_pair(Src, TLI.getTargetData().getIntPtrType()));
std::pair<SDOperand,SDOperand> Result =
- TLI.LowerCallTo(getRoot(), I.getType(), false,
+ TLI.LowerCallTo(getRoot(), I.getType(), false, CallingConv::C, true,
DAG.getExternalSymbol("malloc", IntPtr),
Args, DAG);
setValue(&I, Result.first); // Pointers always fit in registers
TLI.getTargetData().getIntPtrType()));
MVT::ValueType IntPtr = TLI.getPointerTy();
std::pair<SDOperand,SDOperand> Result =
- TLI.LowerCallTo(getRoot(), Type::VoidTy, false,
+ TLI.LowerCallTo(getRoot(), Type::VoidTy, false, CallingConv::C, true,
DAG.getExternalSymbol("free", IntPtr), Args, DAG);
DAG.setRoot(Result.second);
}
-std::pair<SDOperand, SDOperand>
-TargetLowering::LowerVAStart(SDOperand Chain, SelectionDAG &DAG) {
+// InsertAtEndOfBasicBlock - This method should be implemented by targets that
+// mark instructions with the 'usesCustomDAGSchedInserter' flag. These
+// instructions are special in various ways, which require special support to
+// insert. The specified MachineInstr is created but not inserted into any
+// basic blocks, and the scheduler passes ownership of it to this method.
+MachineBasicBlock *TargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI,
+ MachineBasicBlock *MBB) {
+ std::cerr << "If a target marks an instruction with "
+ "'usesCustomDAGSchedInserter', it must implement "
+ "TargetLowering::InsertAtEndOfBasicBlock!\n";
+ abort();
+ return 0;
+}
+
+SDOperand TargetLowering::LowerReturnTo(SDOperand Chain, SDOperand Op,
+ SelectionDAG &DAG) {
+ return DAG.getNode(ISD::RET, MVT::Other, Chain, Op);
+}
+
+SDOperand TargetLowering::LowerVAStart(SDOperand Chain,
+ SDOperand VAListP, Value *VAListV,
+ SelectionDAG &DAG) {
// We have no sane default behavior, just emit a useful error message and bail
// out.
std::cerr << "Variable arguments handling not implemented on this target!\n";
abort();
- return std::make_pair(SDOperand(), SDOperand());
+ return SDOperand();
}
-SDOperand TargetLowering::LowerVAEnd(SDOperand Chain, SDOperand L,
+SDOperand TargetLowering::LowerVAEnd(SDOperand Chain, SDOperand LP, Value *LV,
SelectionDAG &DAG) {
// Default to a noop.
return Chain;
}
-std::pair<SDOperand,SDOperand>
-TargetLowering::LowerVACopy(SDOperand Chain, SDOperand L, SelectionDAG &DAG) {
- // Default to returning the input list.
- return std::make_pair(L, Chain);
+SDOperand TargetLowering::LowerVACopy(SDOperand Chain,
+ SDOperand SrcP, Value *SrcV,
+ SDOperand DestP, Value *DestV,
+ SelectionDAG &DAG) {
+ // Default to copying the input list.
+ SDOperand Val = DAG.getLoad(getPointerTy(), Chain,
+ SrcP, DAG.getSrcValue(SrcV));
+ SDOperand Result = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1),
+ Val, DestP, DAG.getSrcValue(DestV));
+ return Result;
}
std::pair<SDOperand,SDOperand>
-TargetLowering::LowerVAArgNext(bool isVANext, SDOperand Chain, SDOperand VAList,
- const Type *ArgTy, SelectionDAG &DAG) {
+TargetLowering::LowerVAArg(SDOperand Chain, SDOperand VAListP, Value *VAListV,
+ const Type *ArgTy, SelectionDAG &DAG) {
// We have no sane default behavior, just emit a useful error message and bail
// out.
std::cerr << "Variable arguments handling not implemented on this target!\n";
void SelectionDAGLowering::visitVAStart(CallInst &I) {
- std::pair<SDOperand,SDOperand> Result = TLI.LowerVAStart(getRoot(), DAG);
- setValue(&I, Result.first);
- DAG.setRoot(Result.second);
+ DAG.setRoot(TLI.LowerVAStart(getRoot(), getValue(I.getOperand(1)),
+ I.getOperand(1), DAG));
}
void SelectionDAGLowering::visitVAArg(VAArgInst &I) {
std::pair<SDOperand,SDOperand> Result =
- TLI.LowerVAArgNext(false, getRoot(), getValue(I.getOperand(0)),
- I.getType(), DAG);
- setValue(&I, Result.first);
- DAG.setRoot(Result.second);
-}
-
-void SelectionDAGLowering::visitVANext(VANextInst &I) {
- std::pair<SDOperand,SDOperand> Result =
- TLI.LowerVAArgNext(true, getRoot(), getValue(I.getOperand(0)),
- I.getArgType(), DAG);
+ TLI.LowerVAArg(getRoot(), getValue(I.getOperand(0)), I.getOperand(0),
+ I.getType(), DAG);
setValue(&I, Result.first);
DAG.setRoot(Result.second);
}
void SelectionDAGLowering::visitVAEnd(CallInst &I) {
- DAG.setRoot(TLI.LowerVAEnd(getRoot(), getValue(I.getOperand(1)), DAG));
+ DAG.setRoot(TLI.LowerVAEnd(getRoot(), getValue(I.getOperand(1)),
+ I.getOperand(1), DAG));
}
void SelectionDAGLowering::visitVACopy(CallInst &I) {
- std::pair<SDOperand,SDOperand> Result =
- TLI.LowerVACopy(getRoot(), getValue(I.getOperand(1)), DAG);
- setValue(&I, Result.first);
- DAG.setRoot(Result.second);
+ SDOperand Result =
+ TLI.LowerVACopy(getRoot(), getValue(I.getOperand(2)), I.getOperand(2),
+ getValue(I.getOperand(1)), I.getOperand(1), DAG);
+ DAG.setRoot(Result);
}
return std::make_pair(DAG.getConstant(0, getPointerTy()), Chain);
}
-SDOperand TargetLowering::LowerOperation(SDOperand Op) {
+SDOperand TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
assert(0 && "LowerOperation not implemented for this target!");
abort();
return SDOperand();
return RegMap->createVirtualRegister(TLI.getRegClassFor(VT));
}
-
+void SelectionDAGISel::getAnalysisUsage(AnalysisUsage &AU) const {
+ // FIXME: we only modify the CFG to split critical edges. This
+ // updates dom and loop info.
+}
bool SelectionDAGISel::runOnFunction(Function &Fn) {
MachineFunction &MF = MachineFunction::construct(&Fn, TLI.getTargetMachine());
RegMap = MF.getSSARegMap();
DEBUG(std::cerr << "\n\n\n=== " << Fn.getName() << "\n");
+ // First pass, split all critical edges for PHI nodes with incoming values
+ // that are constants, this way the load of the constant into a vreg will not
+ // be placed into MBBs that are used some other way.
+ for (Function::iterator BB = Fn.begin(), E = Fn.end(); BB != E; ++BB) {
+ PHINode *PN;
+ for (BasicBlock::iterator BBI = BB->begin();
+ (PN = dyn_cast<PHINode>(BBI)); ++BBI)
+ for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
+ if (isa<Constant>(PN->getIncomingValue(i)))
+ SplitCriticalEdge(PN->getIncomingBlock(i), BB);
+ }
+
FunctionLoweringInfo FuncInfo(TLI, Fn, MF);
for (Function::iterator I = Fn.begin(), E = Fn.end(); I != E; ++I)
SDOperand SelectionDAGISel::
CopyValueToVirtualRegister(SelectionDAGLowering &SDL, Value *V, unsigned Reg) {
- SelectionDAG &DAG = SDL.DAG;
SDOperand Op = SDL.getValue(V);
assert((Op.getOpcode() != ISD::CopyFromReg ||
- cast<RegSDNode>(Op)->getReg() != Reg) &&
+ cast<RegisterSDNode>(Op.getOperand(1))->getReg() != Reg) &&
"Copy from a reg to the same reg!");
- return DAG.getCopyToReg(SDL.getRoot(), Op, Reg);
-}
-
-/// IsOnlyUsedInOneBasicBlock - If the specified argument is only used in a
-/// single basic block, return that block. Otherwise, return a null pointer.
-static BasicBlock *IsOnlyUsedInOneBasicBlock(Argument *A) {
- if (A->use_empty()) return 0;
- BasicBlock *BB = cast<Instruction>(A->use_back())->getParent();
- for (Argument::use_iterator UI = A->use_begin(), E = A->use_end(); UI != E;
- ++UI)
- if (isa<PHINode>(*UI) || cast<Instruction>(*UI)->getParent() != BB)
- return 0; // Disagreement among the users?
-
- // Okay, there is a single BB user. Only permit this optimization if this is
- // the entry block, otherwise, we might sink argument loads into loops and
- // stuff. Later, when we have global instruction selection, this won't be an
- // issue clearly.
- if (BB == BB->getParent()->begin())
- return BB;
- return 0;
+
+ // If this type is not legal, we must make sure to not create an invalid
+ // register use.
+ MVT::ValueType SrcVT = Op.getValueType();
+ MVT::ValueType DestVT = TLI.getTypeToTransformTo(SrcVT);
+ SelectionDAG &DAG = SDL.DAG;
+ if (SrcVT == DestVT) {
+ return DAG.getCopyToReg(SDL.getRoot(), Reg, Op);
+ } else if (SrcVT < DestVT) {
+ // The src value is promoted to the register.
+ if (MVT::isFloatingPoint(SrcVT))
+ Op = DAG.getNode(ISD::FP_EXTEND, DestVT, Op);
+ else
+ Op = DAG.getNode(ISD::ANY_EXTEND, DestVT, Op);
+ return DAG.getCopyToReg(SDL.getRoot(), Reg, Op);
+ } else {
+ // The src value is expanded into multiple registers.
+ SDOperand Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DestVT,
+ Op, DAG.getConstant(0, MVT::i32));
+ SDOperand Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DestVT,
+ Op, DAG.getConstant(1, MVT::i32));
+ Op = DAG.getCopyToReg(SDL.getRoot(), Reg, Lo);
+ return DAG.getCopyToReg(Op, Reg+1, Hi);
+ }
}
void SelectionDAGISel::
// If this is the entry block, emit arguments.
Function &F = *BB->getParent();
FunctionLoweringInfo &FuncInfo = SDL.FuncInfo;
-
- if (BB == &F.front()) {
- SDOperand OldRoot = SDL.DAG.getRoot();
-
- std::vector<SDOperand> Args = TLI.LowerArguments(F, SDL.DAG);
-
- // If there were side effects accessing the argument list, do not do
- // anything special.
- if (OldRoot != SDL.DAG.getRoot()) {
- unsigned a = 0;
- for (Function::arg_iterator AI = F.arg_begin(), E = F.arg_end();
- AI != E; ++AI,++a)
- if (!AI->use_empty()) {
- SDL.setValue(AI, Args[a]);
- SDOperand Copy =
- CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
- UnorderedChains.push_back(Copy);
- }
- } else {
- // Otherwise, if any argument is only accessed in a single basic block,
- // emit that argument only to that basic block.
- unsigned a = 0;
- for (Function::arg_iterator AI = F.arg_begin(), E = F.arg_end();
- AI != E; ++AI,++a)
- if (!AI->use_empty()) {
- if (BasicBlock *BBU = IsOnlyUsedInOneBasicBlock(AI)) {
- FuncInfo.BlockLocalArguments.insert(std::make_pair(BBU,
- std::make_pair(AI, a)));
- } else {
- SDL.setValue(AI, Args[a]);
- SDOperand Copy =
- CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
- UnorderedChains.push_back(Copy);
- }
- }
+ SDOperand OldRoot = SDL.DAG.getRoot();
+ std::vector<SDOperand> Args = TLI.LowerArguments(F, SDL.DAG);
+
+ unsigned a = 0;
+ for (Function::arg_iterator AI = F.arg_begin(), E = F.arg_end();
+ AI != E; ++AI, ++a)
+ if (!AI->use_empty()) {
+ SDL.setValue(AI, Args[a]);
+
+ // If this argument is live outside of the entry block, insert a copy from
+ // whereever we got it to the vreg that other BB's will reference it as.
+ if (FuncInfo.ValueMap.count(AI)) {
+ SDOperand Copy =
+ CopyValueToVirtualRegister(SDL, AI, FuncInfo.ValueMap[AI]);
+ UnorderedChains.push_back(Copy);
+ }
}
- }
-
- // See if there are any block-local arguments that need to be emitted in this
- // block.
-
- if (!FuncInfo.BlockLocalArguments.empty()) {
- std::multimap<BasicBlock*, std::pair<Argument*, unsigned> >::iterator BLAI =
- FuncInfo.BlockLocalArguments.lower_bound(BB);
- if (BLAI != FuncInfo.BlockLocalArguments.end() && BLAI->first == BB) {
- // Lower the arguments into this block.
- std::vector<SDOperand> Args = TLI.LowerArguments(F, SDL.DAG);
-
- // Set up the value mapping for the local arguments.
- for (; BLAI != FuncInfo.BlockLocalArguments.end() && BLAI->first == BB;
- ++BLAI)
- SDL.setValue(BLAI->second.first, Args[BLAI->second.second]);
- // Any dead arguments will just be ignored here.
- }
+ // Next, if the function has live ins that need to be copied into vregs,
+ // emit the copies now, into the top of the block.
+ MachineFunction &MF = SDL.DAG.getMachineFunction();
+ if (MF.livein_begin() != MF.livein_end()) {
+ SSARegMap *RegMap = MF.getSSARegMap();
+ const MRegisterInfo &MRI = *MF.getTarget().getRegisterInfo();
+ for (MachineFunction::livein_iterator LI = MF.livein_begin(),
+ E = MF.livein_end(); LI != E; ++LI)
+ if (LI->second)
+ MRI.copyRegToReg(*MF.begin(), MF.begin()->end(), LI->second,
+ LI->first, RegMap->getRegClass(LI->second));
}
+
+ // Finally, if the target has anything special to do, allow it to do so.
+ EmitFunctionEntryCode(F, SDL.DAG.getMachineFunction());
}
std::vector<SDOperand> UnorderedChains;
- // Lower any arguments needed in this block.
- LowerArguments(LLVMBB, SDL, UnorderedChains);
+ // Lower any arguments needed in this block if this is the entry block.
+ if (LLVMBB == &LLVMBB->getParent()->front())
+ LowerArguments(LLVMBB, SDL, UnorderedChains);
BB = FuncInfo.MBBMap[LLVMBB];
SDL.setCurrentBasicBlock(BB);
// Turn all of the unordered chains into one factored node.
if (!UnorderedChains.empty()) {
- UnorderedChains.push_back(SDL.getRoot());
+ SDOperand Root = SDL.getRoot();
+ if (Root.getOpcode() != ISD::EntryToken) {
+ unsigned i = 0, e = UnorderedChains.size();
+ for (; i != e; ++i) {
+ assert(UnorderedChains[i].Val->getNumOperands() > 1);
+ if (UnorderedChains[i].Val->getOperand(0) == Root)
+ break; // Don't add the root if we already indirectly depend on it.
+ }
+
+ if (i == e)
+ UnorderedChains.push_back(Root);
+ }
DAG.setRoot(DAG.getNode(ISD::TokenFactor, MVT::Other, UnorderedChains));
}
// types that are not supported by the target.
BuildSelectionDAG(DAG, LLVMBB, PHINodesToUpdate, FuncInfo);
+ // Run the DAG combiner in pre-legalize mode.
+ DAG.Combine(false);
+
DEBUG(std::cerr << "Lowered selection DAG:\n");
DEBUG(DAG.dump());
DEBUG(std::cerr << "Legalized selection DAG:\n");
DEBUG(DAG.dump());
+ // Run the DAG combiner in post-legalize mode.
+ DAG.Combine(true);
+
+ if (ViewDAGs) DAG.viewGraph();
+
// Third, instruction select all of the operations to machine code, adding the
// code to the MachineBasicBlock.
InstructionSelectBasicBlock(DAG);
- if (ViewDAGs) DAG.viewGraph();
-
DEBUG(std::cerr << "Selected machine code:\n");
DEBUG(BB->dump());
projects / oota-llvm.git / blobdiff