Split EVT into MVT and EVT, the former representing _just_ a primitive type, while

[oota-llvm.git] / lib / CodeGen / SelectionDAG / ScheduleDAGSDNodesEmit.cpp

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
index d8736a12adad4be0ef8e5431d2db55755ef260a5..12b5d143f8f25efb1abdc14262bf2f1308832ca4 100644 (file)
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodesEmit.cpp
@@ -70,7 +70,7 @@ EmitCopyFromReg(SDNode *Node, unsigned ResNo, bool IsClone, bool IsCloned,
           if (Op.getNode() != Node || Op.getResNo() != ResNo)
             continue;
           EVT VT = Node->getValueType(Op.getResNo());
-          if (VT == EVT::Other || VT == EVT::Flag)
+          if (VT == MVT::Other || VT == MVT::Flag)
             continue;
           Match = false;
           if (User->isMachineOpcode()) {
@@ -238,8 +238,8 @@ ScheduleDAGSDNodes::AddRegisterOperand(MachineInstr *MI, SDValue Op,
                                        unsigned IIOpNum,
                                        const TargetInstrDesc *II,
                                        DenseMap<SDValue, unsigned> &VRBaseMap) {
-  assert(Op.getValueType() != EVT::Other &&
-         Op.getValueType() != EVT::Flag &&
+  assert(Op.getValueType() != MVT::Other &&
+         Op.getValueType() != MVT::Flag &&
          "Chain and flag operands should occur at end of operand list!");
   // Get/emit the operand.
   unsigned VReg = getVR(Op, VRBaseMap);
@@ -322,8 +322,8 @@ void ScheduleDAGSDNodes::AddOperand(MachineInstr *MI, SDValue Op,
     MI->addOperand(MachineOperand::CreateES(ES->getSymbol(), 0,
                                             ES->getTargetFlags()));
   } else {
-    assert(Op.getValueType() != EVT::Other &&
-           Op.getValueType() != EVT::Flag &&
+    assert(Op.getValueType() != MVT::Other &&
+           Op.getValueType() != MVT::Flag &&
            "Chain and flag operands should occur at end of operand list!");
     AddRegisterOperand(MI, Op, IIOpNum, II, VRBaseMap);
   }
@@ -599,7 +599,7 @@ void ScheduleDAGSDNodes::EmitNode(SDNode *Node, bool IsClone, bool IsCloned,
   }
   case ISD::INLINEASM: {
     unsigned NumOps = Node->getNumOperands();
-    if (Node->getOperand(NumOps-1).getValueType() == EVT::Flag)
+    if (Node->getOperand(NumOps-1).getValueType() == MVT::Flag)
       --NumOps;  // Ignore the flag operand.
       
     // Create the inline asm machine instruction.