#include "llvm/Support/Compiler.h"
#include "llvm/ADT/Statistic.h"
#include <climits>
-#include <iostream>
#include <queue>
#include "llvm/Support/CommandLine.h"
using namespace llvm;
/// Schedule - Schedule the DAG using list scheduling.
void ScheduleDAGRRList::Schedule() {
- DEBUG(std::cerr << "********** List Scheduling **********\n");
+ DOUT << "********** List Scheduling **********\n";
// Build scheduling units.
BuildSchedUnits();
CommuteNodesToReducePressure();
- DEBUG(std::cerr << "*** Final schedule ***\n");
+ DOUT << "*** Final schedule ***\n";
DEBUG(dumpSchedule());
- DEBUG(std::cerr << "\n");
+ DOUT << "\n";
// Emit in scheduled order
EmitSchedule();
unsigned NumRes = CountResults(SU->Node);
unsigned NumOps = CountOperands(SU->Node);
for (unsigned j = 0; j != NumOps; ++j) {
- if (TII->getOperandConstraint(Opc, j+NumRes,
- TargetInstrInfo::TIED_TO) == -1)
+ if (TII->getOperandConstraint(Opc, j+NumRes, TOI::TIED_TO) == -1)
continue;
SDNode *OpN = SU->Node->getOperand(j).Val;
#ifndef NDEBUG
if (PredSU->NumSuccsLeft < 0 || PredSU->NumChainSuccsLeft < 0) {
- std::cerr << "*** List scheduling failed! ***\n";
+ cerr << "*** List scheduling failed! ***\n";
PredSU->dump(&DAG);
- std::cerr << " has been released too many times!\n";
+ cerr << " has been released too many times!\n";
assert(0);
}
#endif
/// count of its predecessors. If a predecessor pending count is zero, add it to
/// the Available queue.
void ScheduleDAGRRList::ScheduleNodeBottomUp(SUnit *SU, unsigned CurCycle) {
- DEBUG(std::cerr << "*** Scheduling [" << CurCycle << "]: ");
+ DOUT << "*** Scheduling [" << CurCycle << "]: ";
DEBUG(SU->dump(&DAG));
SU->Cycle = CurCycle;
for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
if (SUnits[i].NumSuccsLeft != 0 || SUnits[i].NumChainSuccsLeft != 0) {
if (!AnyNotSched)
- std::cerr << "*** List scheduling failed! ***\n";
+ cerr << "*** List scheduling failed! ***\n";
SUnits[i].dump(&DAG);
- std::cerr << "has not been scheduled!\n";
+ cerr << "has not been scheduled!\n";
AnyNotSched = true;
}
}
#ifndef NDEBUG
if (SuccSU->NumPredsLeft < 0 || SuccSU->NumChainPredsLeft < 0) {
- std::cerr << "*** List scheduling failed! ***\n";
+ cerr << "*** List scheduling failed! ***\n";
SuccSU->dump(&DAG);
- std::cerr << " has been released too many times!\n";
+ cerr << " has been released too many times!\n";
assert(0);
}
#endif
/// count of its successors. If a successor pending count is zero, add it to
/// the Available queue.
void ScheduleDAGRRList::ScheduleNodeTopDown(SUnit *SU, unsigned CurCycle) {
- DEBUG(std::cerr << "*** Scheduling [" << CurCycle << "]: ");
+ DOUT << "*** Scheduling [" << CurCycle << "]: ";
DEBUG(SU->dump(&DAG));
SU->Cycle = CurCycle;
for (unsigned i = 0, e = SUnits.size(); i != e; ++i) {
if (!SUnits[i].isScheduled) {
if (!AnyNotSched)
- std::cerr << "*** List scheduling failed! ***\n";
+ cerr << "*** List scheduling failed! ***\n";
SUnits[i].dump(&DAG);
- std::cerr << "has not been scheduled!\n";
+ cerr << "has not been scheduled!\n";
AnyNotSched = true;
}
}
};
} // end anonymous namespace
+static inline bool isCopyFromLiveIn(const SUnit *SU) {
+ SDNode *N = SU->Node;
+ return N->getOpcode() == ISD::CopyFromReg &&
+ N->getOperand(N->getNumOperands()-1).getValueType() != MVT::Flag;
+}
+
namespace {
template<class SF>
class VISIBILITY_HIDDEN RegReductionPriorityQueue
RegReductionPriorityQueue() :
Queue(SF(this)) {}
- virtual void initNodes(std::map<SDNode*, SUnit*> &sumap,
+ virtual void initNodes(DenseMap<SDNode*, SUnit*> &sumap,
std::vector<SUnit> &sunits) {}
virtual void releaseState() {}
- virtual int getSethiUllmanNumber(unsigned NodeNum) const {
+ virtual unsigned getNodePriority(const SUnit *SU) const {
return 0;
}
class VISIBILITY_HIDDEN BURegReductionPriorityQueue
: public RegReductionPriorityQueue<SF> {
// SUnitMap SDNode to SUnit mapping (n -> 1).
- std::map<SDNode*, SUnit*> *SUnitMap;
+ DenseMap<SDNode*, SUnit*> *SUnitMap;
// SUnits - The SUnits for the current graph.
const std::vector<SUnit> *SUnits;
// SethiUllmanNumbers - The SethiUllman number for each node.
- std::vector<int> SethiUllmanNumbers;
+ std::vector<unsigned> SethiUllmanNumbers;
const TargetInstrInfo *TII;
public:
BURegReductionPriorityQueue(const TargetInstrInfo *tii)
: TII(tii) {}
- void initNodes(std::map<SDNode*, SUnit*> &sumap,
+ void initNodes(DenseMap<SDNode*, SUnit*> &sumap,
std::vector<SUnit> &sunits) {
SUnitMap = &sumap;
SUnits = &sunits;
// Add pseudo dependency edges for two-address nodes.
AddPseudoTwoAddrDeps();
// Calculate node priorities.
- CalculatePriorities();
+ CalculateSethiUllmanNumbers();
}
void releaseState() {
SethiUllmanNumbers.clear();
}
- int getSethiUllmanNumber(unsigned NodeNum) const {
- assert(NodeNum < SethiUllmanNumbers.size());
- return SethiUllmanNumbers[NodeNum];
+ unsigned getNodePriority(const SUnit *SU) const {
+ assert(SU->NodeNum < SethiUllmanNumbers.size());
+ unsigned Opc = SU->Node->getOpcode();
+ if (Opc == ISD::CopyFromReg && !isCopyFromLiveIn(SU))
+ // CopyFromReg should be close to its def because it restricts
+ // allocation choices. But if it is a livein then perhaps we want it
+ // closer to its uses so it can be coalesced.
+ return 0xffff;
+ else if (Opc == ISD::TokenFactor || Opc == ISD::CopyToReg)
+ // CopyToReg should be close to its uses to facilitate coalescing and
+ // avoid spilling.
+ return 0;
+ else if (SU->NumSuccs == 0)
+ // If SU does not have a use, i.e. it doesn't produce a value that would
+ // be consumed (e.g. store), then it terminates a chain of computation.
+ // Give it a large SethiUllman number so it will be scheduled right
+ // before its predecessors that it doesn't lengthen their live ranges.
+ return 0xffff;
+ else if (SU->NumPreds == 0)
+ // If SU does not have a def, schedule it close to its uses because it
+ // does not lengthen any live ranges.
+ return 0;
+ else
+ return SethiUllmanNumbers[SU->NodeNum];
}
bool isDUOperand(const SUnit *SU1, const SUnit *SU2) {
unsigned NumRes = ScheduleDAG::CountResults(SU1->Node);
unsigned NumOps = ScheduleDAG::CountOperands(SU1->Node);
for (unsigned i = 0; i != NumOps; ++i) {
- if (TII->getOperandConstraint(Opc, i+NumRes,
- TargetInstrInfo::TIED_TO) == -1)
+ if (TII->getOperandConstraint(Opc, i+NumRes, TOI::TIED_TO) == -1)
continue;
if (SU1->Node->getOperand(i).isOperand(SU2->Node))
return true;
private:
bool canClobber(SUnit *SU, SUnit *Op);
void AddPseudoTwoAddrDeps();
- void CalculatePriorities();
- int CalcNodePriority(const SUnit *SU);
+ void CalculateSethiUllmanNumbers();
+ unsigned CalcNodeSethiUllmanNumber(const SUnit *SU);
};
template<class SF>
class TDRegReductionPriorityQueue : public RegReductionPriorityQueue<SF> {
// SUnitMap SDNode to SUnit mapping (n -> 1).
- std::map<SDNode*, SUnit*> *SUnitMap;
+ DenseMap<SDNode*, SUnit*> *SUnitMap;
// SUnits - The SUnits for the current graph.
const std::vector<SUnit> *SUnits;
// SethiUllmanNumbers - The SethiUllman number for each node.
- std::vector<int> SethiUllmanNumbers;
+ std::vector<unsigned> SethiUllmanNumbers;
public:
TDRegReductionPriorityQueue() {}
- void initNodes(std::map<SDNode*, SUnit*> &sumap,
+ void initNodes(DenseMap<SDNode*, SUnit*> &sumap,
std::vector<SUnit> &sunits) {
SUnitMap = &sumap;
SUnits = &sunits;
// Calculate node priorities.
- CalculatePriorities();
+ CalculateSethiUllmanNumbers();
}
void releaseState() {
SethiUllmanNumbers.clear();
}
- int getSethiUllmanNumber(unsigned NodeNum) const {
- assert(NodeNum < SethiUllmanNumbers.size());
- return SethiUllmanNumbers[NodeNum];
+ unsigned getNodePriority(const SUnit *SU) const {
+ assert(SU->NodeNum < SethiUllmanNumbers.size());
+ return SethiUllmanNumbers[SU->NodeNum];
}
private:
- void CalculatePriorities();
- int CalcNodePriority(const SUnit *SU);
+ void CalculateSethiUllmanNumbers();
+ unsigned CalcNodeSethiUllmanNumber(const SUnit *SU);
};
}
-static bool isFloater(const SUnit *SU) {
- if (SU->Node->isTargetOpcode()) {
- if (SU->NumPreds == 0)
- return true;
- if (SU->NumPreds == 1) {
- for (SUnit::const_pred_iterator I = SU->Preds.begin(),E = SU->Preds.end();
- I != E; ++I) {
- if (I->second) continue;
-
- SUnit *PredSU = I->first;
- unsigned Opc = PredSU->Node->getOpcode();
- if (Opc != ISD::EntryToken && Opc != ISD::TokenFactor &&
- Opc != ISD::CopyToReg)
- return false;
- }
- return true;
- }
+/// closestSucc - Returns the scheduled cycle of the successor which is
+/// closet to the current cycle.
+static unsigned closestSucc(const SUnit *SU) {
+ unsigned MaxCycle = 0;
+ for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end();
+ I != E; ++I) {
+ unsigned Cycle = I->first->Cycle;
+ // If there are bunch of CopyToRegs stacked up, they should be considered
+ // to be at the same position.
+ if (I->first->Node->getOpcode() == ISD::CopyToReg)
+ Cycle = closestSucc(I->first)+1;
+ if (Cycle > MaxCycle)
+ MaxCycle = Cycle;
}
- return false;
+ return MaxCycle;
}
-static bool isSimpleFloaterUse(const SUnit *SU) {
- unsigned NumOps = 0;
+/// calcMaxScratches - Returns an cost estimate of the worse case requirement
+/// for scratch registers. Live-in operands and live-out results don't count
+/// since they are "fixed".
+static unsigned calcMaxScratches(const SUnit *SU) {
+ unsigned Scratches = 0;
for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
I != E; ++I) {
- if (I->second) continue;
- if (++NumOps > 1)
- return false;
- if (!isFloater(I->first))
- return false;
+ if (I->second) continue; // ignore chain preds
+ if (I->first->Node->getOpcode() != ISD::CopyFromReg)
+ Scratches++;
}
- return true;
+ for (SUnit::const_succ_iterator I = SU->Succs.begin(), E = SU->Succs.end();
+ I != E; ++I) {
+ if (I->second) continue; // ignore chain succs
+ if (I->first->Node->getOpcode() != ISD::CopyToReg)
+ Scratches += 10;
+ }
+ return Scratches;
}
// Bottom up
bool bu_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const {
- unsigned LeftNum = left->NodeNum;
- unsigned RightNum = right->NodeNum;
bool LIsTarget = left->Node->isTargetOpcode();
bool RIsTarget = right->Node->isTargetOpcode();
- int LPriority = SPQ->getSethiUllmanNumber(LeftNum);
- int RPriority = SPQ->getSethiUllmanNumber(RightNum);
- int LBonus = 0;
- int RBonus = 0;
-
- // Schedule floaters (e.g. load from some constant address) and those nodes
- // with a single predecessor each first. They maintain / reduce register
- // pressure.
- if (isFloater(left) || isSimpleFloaterUse(left))
- LBonus += 2;
- if (isFloater(right) || isSimpleFloaterUse(right))
- RBonus += 2;
// Special tie breaker: if two nodes share a operand, the one that use it
// as a def&use operand is preferred.
if (LIsTarget && RIsTarget) {
- if (left->isTwoAddress && !right->isTwoAddress) {
+ if (left->isTwoAddress && !right->isTwoAddress)
if (SPQ->isDUOperand(left, right))
- LBonus += 2;
- }
- if (!left->isTwoAddress && right->isTwoAddress) {
+ return false;
+ if (!left->isTwoAddress && right->isTwoAddress)
if (SPQ->isDUOperand(right, left))
- RBonus += 2;
- }
+ return true;
}
- if (LPriority+LBonus < RPriority+RBonus)
+ unsigned LPriority = SPQ->getNodePriority(left);
+ unsigned RPriority = SPQ->getNodePriority(right);
+ if (LPriority > RPriority)
return true;
- else if (LPriority+LBonus == RPriority+RBonus)
- if (left->Height > right->Height)
+ else if (LPriority == RPriority) {
+ // Try schedule def + use closer whne Sethi-Ullman numbers are the same.
+ // e.g.
+ // t1 = op t2, c1
+ // t3 = op t4, c2
+ //
+ // and the following instructions are both ready.
+ // t2 = op c3
+ // t4 = op c4
+ //
+ // Then schedule t2 = op first.
+ // i.e.
+ // t4 = op c4
+ // t2 = op c3
+ // t1 = op t2, c1
+ // t3 = op t4, c2
+ //
+ // This creates more short live intervals.
+ unsigned LDist = closestSucc(left);
+ unsigned RDist = closestSucc(right);
+ if (LDist < RDist)
return true;
- else if (left->Height == right->Height)
- if (left->Depth < right->Depth)
+ else if (LDist == RDist) {
+ // Intuitively, it's good to push down instructions whose results are
+ // liveout so their long live ranges won't conflict with other values
+ // which are needed inside the BB. Further prioritize liveout instructions
+ // by the number of operands which are calculated within the BB.
+ unsigned LScratch = calcMaxScratches(left);
+ unsigned RScratch = calcMaxScratches(right);
+ if (LScratch > RScratch)
return true;
- else if (left->Depth == right->Depth)
- if (left->CycleBound > right->CycleBound)
+ else if (LScratch == RScratch)
+ if (left->Height > right->Height)
return true;
+ else if (left->Height == right->Height)
+ if (left->Depth < right->Depth)
+ return true;
+ else if (left->Depth == right->Depth)
+ if (left->CycleBound > right->CycleBound)
+ return true;
+ }
+ }
return false;
}
-static inline bool isCopyFromLiveIn(const SUnit *SU) {
- SDNode *N = SU->Node;
- return N->getOpcode() == ISD::CopyFromReg &&
- N->getOperand(N->getNumOperands()-1).getValueType() != MVT::Flag;
-}
-
// FIXME: This is probably too slow!
static void isReachable(SUnit *SU, SUnit *TargetSU,
std::set<SUnit *> &Visited, bool &Reached) {
unsigned NumRes = ScheduleDAG::CountResults(SU->Node);
unsigned NumOps = ScheduleDAG::CountOperands(SU->Node);
for (unsigned i = 0; i != NumOps; ++i) {
- if (TII->getOperandConstraint(Opc, i+NumRes,
- TargetInstrInfo::TIED_TO) != -1) {
+ if (TII->getOperandConstraint(Opc, i+NumRes, TOI::TIED_TO) != -1) {
SDNode *DU = SU->Node->getOperand(i).Val;
if (Op == (*SUnitMap)[DU])
return true;
unsigned NumRes = ScheduleDAG::CountResults(Node);
unsigned NumOps = ScheduleDAG::CountOperands(Node);
for (unsigned j = 0; j != NumOps; ++j) {
- if (TII->getOperandConstraint(Opc, j+NumRes,
- TargetInstrInfo::TIED_TO) != -1) {
+ if (TII->getOperandConstraint(Opc, j+NumRes, TOI::TIED_TO) != -1) {
SDNode *DU = SU->Node->getOperand(j).Val;
SUnit *DUSU = (*SUnitMap)[DU];
if (!DUSU) continue;
(!canClobber(SuccSU, DUSU) ||
(!SU->isCommutable && SuccSU->isCommutable))){
if (SuccSU->Depth == SU->Depth && !isReachable(SuccSU, SU)) {
- DEBUG(std::cerr << "Adding an edge from SU # " << SU->NodeNum
- << " to SU #" << SuccSU->NodeNum << "\n");
+ DOUT << "Adding an edge from SU # " << SU->NodeNum
+ << " to SU #" << SuccSU->NodeNum << "\n";
if (SU->addPred(SuccSU, true))
SU->NumChainPredsLeft++;
if (SuccSU->addSucc(SU, true))
}
}
-/// CalcNodePriority - Priority is the Sethi Ullman number.
+/// CalcNodeSethiUllmanNumber - Priority is the Sethi Ullman number.
/// Smaller number is the higher priority.
template<class SF>
-int BURegReductionPriorityQueue<SF>::CalcNodePriority(const SUnit *SU) {
- int &SethiUllmanNumber = SethiUllmanNumbers[SU->NodeNum];
+unsigned BURegReductionPriorityQueue<SF>::
+CalcNodeSethiUllmanNumber(const SUnit *SU) {
+ unsigned &SethiUllmanNumber = SethiUllmanNumbers[SU->NodeNum];
if (SethiUllmanNumber != 0)
return SethiUllmanNumber;
- unsigned Opc = SU->Node->getOpcode();
- if (Opc == ISD::CopyFromReg && !isCopyFromLiveIn(SU))
- // CopyFromReg should be close to its def because it restricts allocation
- // choices. But if it is a livein then perhaps we want it closer to the
- // uses so it can be coalesced.
- SethiUllmanNumber = INT_MIN + 10;
- else if (Opc == ISD::TokenFactor || Opc == ISD::CopyToReg)
- // CopyToReg should be close to its uses to facilitate coalescing and avoid
- // spilling.
- SethiUllmanNumber = INT_MAX - 10;
- else if (SU->NumSuccsLeft == 0)
- // If SU does not have a use, i.e. it doesn't produce a value that would
- // be consumed (e.g. store), then it terminates a chain of computation.
- // Give it a small SethiUllman number so it will be scheduled right before its
- // predecessors that it doesn't lengthen their live ranges.
- SethiUllmanNumber = INT_MIN + 10;
- else if (SU->NumPredsLeft == 0)
- // If SU does not have a def, schedule it close to its uses because it does
- // not lengthen any live ranges.
- SethiUllmanNumber = INT_MAX - 10;
- else {
- int Extra = 0;
- for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
- I != E; ++I) {
- if (I->second) continue; // ignore chain preds
- SUnit *PredSU = I->first;
- int PredSethiUllman = CalcNodePriority(PredSU);
- if (PredSethiUllman > SethiUllmanNumber) {
- SethiUllmanNumber = PredSethiUllman;
- Extra = 0;
- } else if (PredSethiUllman == SethiUllmanNumber && !I->second)
- Extra++;
- }
-
- SethiUllmanNumber += Extra;
+ unsigned Extra = 0;
+ for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
+ I != E; ++I) {
+ if (I->second) continue; // ignore chain preds
+ SUnit *PredSU = I->first;
+ unsigned PredSethiUllman = CalcNodeSethiUllmanNumber(PredSU);
+ if (PredSethiUllman > SethiUllmanNumber) {
+ SethiUllmanNumber = PredSethiUllman;
+ Extra = 0;
+ } else if (PredSethiUllman == SethiUllmanNumber && !I->second)
+ Extra++;
}
+
+ SethiUllmanNumber += Extra;
+
+ if (SethiUllmanNumber == 0)
+ SethiUllmanNumber = 1;
return SethiUllmanNumber;
}
-/// CalculatePriorities - Calculate priorities of all scheduling units.
+/// CalculateSethiUllmanNumbers - Calculate Sethi-Ullman numbers of all
+/// scheduling units.
template<class SF>
-void BURegReductionPriorityQueue<SF>::CalculatePriorities() {
+void BURegReductionPriorityQueue<SF>::CalculateSethiUllmanNumbers() {
SethiUllmanNumbers.assign(SUnits->size(), 0);
for (unsigned i = 0, e = SUnits->size(); i != e; ++i)
- CalcNodePriority(&(*SUnits)[i]);
+ CalcNodeSethiUllmanNumber(&(*SUnits)[i]);
}
static unsigned SumOfUnscheduledPredsOfSuccs(const SUnit *SU) {
// Top down
bool td_ls_rr_sort::operator()(const SUnit *left, const SUnit *right) const {
- unsigned LeftNum = left->NodeNum;
- unsigned RightNum = right->NodeNum;
- int LPriority = SPQ->getSethiUllmanNumber(LeftNum);
- int RPriority = SPQ->getSethiUllmanNumber(RightNum);
+ unsigned LPriority = SPQ->getNodePriority(left);
+ unsigned RPriority = SPQ->getNodePriority(right);
bool LIsTarget = left->Node->isTargetOpcode();
bool RIsTarget = right->Node->isTargetOpcode();
bool LIsFloater = LIsTarget && left->NumPreds == 0;
return false;
}
-/// CalcNodePriority - Priority is the Sethi Ullman number.
+/// CalcNodeSethiUllmanNumber - Priority is the Sethi Ullman number.
/// Smaller number is the higher priority.
template<class SF>
-int TDRegReductionPriorityQueue<SF>::CalcNodePriority(const SUnit *SU) {
- int &SethiUllmanNumber = SethiUllmanNumbers[SU->NodeNum];
+unsigned TDRegReductionPriorityQueue<SF>::
+CalcNodeSethiUllmanNumber(const SUnit *SU) {
+ unsigned &SethiUllmanNumber = SethiUllmanNumbers[SU->NodeNum];
if (SethiUllmanNumber != 0)
return SethiUllmanNumber;
unsigned Opc = SU->Node->getOpcode();
if (Opc == ISD::TokenFactor || Opc == ISD::CopyToReg)
- SethiUllmanNumber = INT_MAX - 10;
+ SethiUllmanNumber = 0xffff;
else if (SU->NumSuccsLeft == 0)
// If SU does not have a use, i.e. it doesn't produce a value that would
// be consumed (e.g. store), then it terminates a chain of computation.
- // Give it a small SethiUllman number so it will be scheduled right before its
- // predecessors that it doesn't lengthen their live ranges.
- SethiUllmanNumber = INT_MIN + 10;
+ // Give it a small SethiUllman number so it will be scheduled right before
+ // its predecessors that it doesn't lengthen their live ranges.
+ SethiUllmanNumber = 0;
else if (SU->NumPredsLeft == 0 &&
(Opc != ISD::CopyFromReg || isCopyFromLiveIn(SU)))
- SethiUllmanNumber = 1;
+ SethiUllmanNumber = 0xffff;
else {
int Extra = 0;
for (SUnit::const_pred_iterator I = SU->Preds.begin(), E = SU->Preds.end();
I != E; ++I) {
if (I->second) continue; // ignore chain preds
SUnit *PredSU = I->first;
- int PredSethiUllman = CalcNodePriority(PredSU);
+ unsigned PredSethiUllman = CalcNodeSethiUllmanNumber(PredSU);
if (PredSethiUllman > SethiUllmanNumber) {
SethiUllmanNumber = PredSethiUllman;
Extra = 0;
return SethiUllmanNumber;
}
-/// CalculatePriorities - Calculate priorities of all scheduling units.
+/// CalculateSethiUllmanNumbers - Calculate Sethi-Ullman numbers of all
+/// scheduling units.
template<class SF>
-void TDRegReductionPriorityQueue<SF>::CalculatePriorities() {
+void TDRegReductionPriorityQueue<SF>::CalculateSethiUllmanNumbers() {
SethiUllmanNumbers.assign(SUnits->size(), 0);
for (unsigned i = 0, e = SUnits->size(); i != e; ++i)
- CalcNodePriority(&(*SUnits)[i]);
+ CalcNodeSethiUllmanNumber(&(*SUnits)[i]);
}
//===----------------------------------------------------------------------===//
SelectionDAG *DAG,
MachineBasicBlock *BB) {
return new ScheduleDAGRRList(*DAG, BB, DAG->getTarget(), false,
- new TDRegReductionPriorityQueue<td_ls_rr_sort>());
+ new TDRegReductionPriorityQueue<td_ls_rr_sort>());
}
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