Disengage DEBUG_LOC from non-PPC targets.

[oota-llvm.git] / lib / CodeGen / SelectionDAG / ScheduleDAG.cpp

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
index ef90fc048c537b63629725d710f83e2d099ffad6..c39f0cd5614f26f5538da5d4fda9ac1dc8bd2bcf 100644 (file)
--- a/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
@@ -26,6 +26,7 @@
 #include "llvm/Support/CommandLine.h"
 #include "llvm/Support/Debug.h"
 #include <iostream>
+#include <algorithm>
 using namespace llvm;
 
 namespace {
@@ -280,7 +281,9 @@ public:
   InstrStage    *StageBegin;            // First stage in itinerary
   InstrStage    *StageEnd;              // Last+1 stage in itinerary
   unsigned      Latency;                // Total cycles to complete instruction
-  bool          IsCall;                 // Is function call
+  bool          IsCall : 1;             // Is function call
+  bool          IsLoad : 1;             // Is memory load
+  bool          IsStore : 1;            // Is memory store
   unsigned      Slot;                   // Node's time slot
   NodeGroup     *Group;                 // Grouping information
   unsigned      VRBase;                 // Virtual register base
@@ -682,8 +685,13 @@ void SimpleSched::IncludeNode(NodeInfo *NI) {
 /// Note that the ordering in the Nodes vector is reversed.
 void SimpleSched::VisitAll() {
   // Add first element to list
-  Ordering.push_back(getNI(DAG.getRoot().Val));
-  
+  NodeInfo *NI = getNI(DAG.getRoot().Val);
+  if (NI->isInGroup()) {
+    Ordering.push_back(NI->Group->getDominator());
+  } else {
+    Ordering.push_back(NI);
+  }
+
   // Iterate through all nodes that have been added
   for (unsigned i = 0; i < Ordering.size(); i++) { // note: size() varies
     // Visit all operands
@@ -750,6 +758,8 @@ void SimpleSched::GatherSchedulingInfo() {
         // Get machine opcode
         MachineOpCode TOpc = Node->getTargetOpcode();
         NI->IsCall = TII.isCall(TOpc);
+        NI->IsLoad = TII.isLoad(TOpc);
+        NI->IsStore = TII.isStore(TOpc);
 
         if (TII.isLoad(TOpc))              NI->StageBegin = &LoadStage;
         else if (TII.isStore(TOpc))        NI->StageBegin = &StoreStage;
@@ -850,8 +860,9 @@ void SimpleSched::PrepareNodeInfo() {
 /// isStrongDependency - Return true if node A has results used by node B. 
 /// I.E., B must wait for latency of A.
 bool SimpleSched::isStrongDependency(NodeInfo *A, NodeInfo *B) {
-  // If A defines for B then it's a strong dependency
-  return isDefiner(A, B);
+  // If A defines for B then it's a strong dependency or
+  // if a load follows a store (may be dependent but why take a chance.)
+  return isDefiner(A, B) || (A->IsStore && B->IsLoad);
 }
 
 /// isWeakDependency Return true if node A produces a result that will