cl::desc("Track reg pressure and switch priority to in-depth"));
ResourcePriorityQueue::ResourcePriorityQueue(SelectionDAGISel *IS)
- : Picker(this), InstrItins(IS->getTargetLowering()
- ->getTargetMachine()
- .getSubtargetImpl()
- ->getInstrItineraryData()) {
- const TargetMachine &TM = (*IS->MF).getTarget();
- TRI = TM.getSubtargetImpl()->getRegisterInfo();
- TLI = IS->getTargetLowering();
- TII = TM.getSubtargetImpl()->getInstrInfo();
- ResourcesModel = TII->CreateTargetScheduleState(&TM, nullptr);
+ : Picker(this), InstrItins(IS->MF->getSubtarget().getInstrItineraryData()) {
+ const TargetSubtargetInfo &STI = IS->MF->getSubtarget();
+ TRI = STI.getRegisterInfo();
+ TLI = IS->TLI;
+ TII = STI.getInstrInfo();
+ ResourcesModel.reset(TII->CreateTargetScheduleState(STI));
// This hard requirement could be relaxed, but for now
- // do not let it procede.
+ // do not let it proceed.
assert(ResourcesModel && "Unimplemented CreateTargetScheduleState.");
unsigned NumRC = TRI->getNumRegClasses();
}
// Now see if there are no other dependencies
- // to instructions alredy in the packet.
+ // to instructions already in the packet.
for (unsigned i = 0, e = Packet.size(); i != e; ++i)
for (SUnit::const_succ_iterator I = Packet[i]->Succs.begin(),
E = Packet[i]->Succs.end(); I != E; ++I) {
// Since we do not add pseudos to packets, might as well
- // ignor order deps.
+ // ignore order deps.
if (I->isCtrl())
continue;
Queue.pop_back();
}
-
-
-#ifdef NDEBUG
-void ResourcePriorityQueue::dump(ScheduleDAG *DAG) const {}
-#else
-void ResourcePriorityQueue::dump(ScheduleDAG *DAG) const {
- ResourcePriorityQueue q = *this;
- while (!q.empty()) {
- SUnit *su = q.pop();
- dbgs() << "Height " << su->getHeight() << ": ";
- su->dump(DAG);
- }
-}
-#endif