Remove unused variable.

[oota-llvm.git] / lib / CodeGen / ScheduleDAGInstrs.h

diff --git a/lib/CodeGen/ScheduleDAGInstrs.h b/lib/CodeGen/ScheduleDAGInstrs.h
index f3932892563677889a153d04aff29bb9389ca7ab..17183644cc388f6f6e3e2c2fe4ac2dceb4a6f83e 100644 (file)
--- a/lib/CodeGen/ScheduleDAGInstrs.h
+++ b/lib/CodeGen/ScheduleDAGInstrs.h
@@ -20,6 +20,7 @@
 #include "llvm/CodeGen/ScheduleDAG.h"
 #include "llvm/Support/Compiler.h"
 #include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/ADT/IndexedMap.h"
 #include "llvm/ADT/SmallSet.h"
 #include <map>
 
@@ -107,6 +108,10 @@ namespace llvm {
     /// isPostRA flag indicates vregs cannot be present.
     bool IsPostRA;
 
+    /// UnitLatencies (misnamed) flag avoids computing def-use latencies, using
+    /// the def-side latency only.
+    bool UnitLatencies;
+
     /// Defs, Uses - Remember where defs and uses of each register are as we
     /// iterate upward through the instructions. This is allocated here instead
     /// of inside BuildSchedGraph to avoid the need for it to be initialized and
@@ -114,6 +119,13 @@ namespace llvm {
     std::vector<std::vector<SUnit *> > Defs;
     std::vector<std::vector<SUnit *> > Uses;
 
+    // Virtual register Defs and Uses.
+    //
+    // TODO: Eliminate VRegUses by creating SUnits in a prepass and looking up
+    // the live range's reaching def.
+    IndexedMap<SUnit*, VirtReg2IndexFunctor> VRegDefs;
+    IndexedMap<std::vector<SUnit*>, VirtReg2IndexFunctor> VRegUses;
+
     /// PendingLoads - Remember where unknown loads are after the most recent
     /// unknown store, as we iterate. As with Defs and Uses, this is here
     /// to minimize construction/destruction.
@@ -205,6 +217,11 @@ namespace llvm {
     virtual void dumpNode(const SUnit *SU) const;
 
     virtual std::string getGraphNodeLabel(const SUnit *SU) const;
+
+  protected:
+    void addPhysRegDeps(SUnit *SU, unsigned OperIdx);
+    void addVRegDefDeps(SUnit *SU, unsigned OperIdx);
+    void addVRegUseDeps(SUnit *SU, unsigned OperIdx);
   };
 }