Avoid unnecessarily casting away const.

[oota-llvm.git] / lib / CodeGen / RegisterScavenging.cpp

diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp
index 1555a63727a84c9cf8e85ce71c601fc4d2cb83a4..aeed72cef52e955f6f97d5044d6faabaf00de54f 100644 (file)
--- a/lib/CodeGen/RegisterScavenging.cpp
+++ b/lib/CodeGen/RegisterScavenging.cpp
@@ -2,8 +2,8 @@
 //
 //                     The LLVM Compiler Infrastructure
 //
-// This file was developed by the Evan Cheng and is distributed under the
-// University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
 //
 //===----------------------------------------------------------------------===//
 //
@@ -72,7 +72,7 @@ void RegScavenger::restoreScavengedReg() {
   if (!ScavengedReg)
     return;
 
-  RegInfo->loadRegFromStackSlot(*MBB, MBBI, ScavengedReg,
+  TII->loadRegFromStackSlot(*MBB, MBBI, ScavengedReg,
                                 ScavengingFrameIndex, ScavengedRC);
   MachineBasicBlock::iterator II = prior(MBBI);
   RegInfo->eliminateFrameIndex(II, 0, this);
@@ -92,17 +92,18 @@ void RegScavenger::forward() {
   }
 
   MachineInstr *MI = MBBI;
+  const TargetInstrDesc &TID = MI->getDesc();
 
   // Reaching a terminator instruction. Restore a scavenged register (which
   // must be life out.
-  if (TII->isTerminatorInstr(MI->getOpcode()))
+  if (TID.isTerminator())
     restoreScavengedReg();
 
   // Process uses first.
   BitVector ChangedRegs(NumPhysRegs);
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);
-    if (!MO.isReg() || !MO.isUse())
+    if (!MO.isRegister() || !MO.isUse())
       continue;
     unsigned Reg = MO.getReg();
     if (Reg == 0)
@@ -110,7 +111,7 @@ void RegScavenger::forward() {
     if (!isUsed(Reg)) {
       // Register has been scavenged. Restore it!
       if (Reg != ScavengedReg)
-        assert(false);
+        assert(false && "Using an undefined register!");
       else
         restoreScavengedReg();
     }
@@ -122,10 +123,9 @@ void RegScavenger::forward() {
   setUnused(ChangedRegs);
 
   // Process defs.
-  const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);
-    if (!MO.isReg() || !MO.isDef())
+    if (!MO.isRegister() || !MO.isDef())
       continue;
     unsigned Reg = MO.getReg();
     // If it's dead upon def, then it is now free.
@@ -134,11 +134,12 @@ void RegScavenger::forward() {
       continue;
     }
     // Skip two-address destination operand.
-    if (TID->findTiedToSrcOperand(i) != -1) {
-      assert(isUsed(Reg));
+    if (TID.findTiedToSrcOperand(i) != -1) {
+      assert(isUsed(Reg) && "Using an undefined register!");
       continue;
     }
-    assert(isUnused(Reg) || isReserved(Reg));
+    assert((isUnused(Reg) || isReserved(Reg)) &&
+           "Re-defining a live register!");
     setUsed(Reg);
   }
 }
@@ -151,13 +152,13 @@ void RegScavenger::backward() {
 
   MachineInstr *MI = MBBI;
   // Process defs first.
-  const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
+  const TargetInstrDesc &TID = MI->getDesc();
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);
-    if (!MO.isReg() || !MO.isDef())
+    if (!MO.isRegister() || !MO.isDef())
       continue;
     // Skip two-address destination operand.
-    if (TID->findTiedToSrcOperand(i) != -1)
+    if (TID.findTiedToSrcOperand(i) != -1)
       continue;
     unsigned Reg = MO.getReg();
     assert(isUsed(Reg));
@@ -169,7 +170,7 @@ void RegScavenger::backward() {
   BitVector ChangedRegs(NumPhysRegs);
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);
-    if (!MO.isReg() || !MO.isUse())
+    if (!MO.isRegister() || !MO.isUse())
       continue;
     unsigned Reg = MO.getReg();
     if (Reg == 0)
@@ -256,7 +257,7 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
   // Exclude all the registers being used by the instruction.
   for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
     MachineOperand &MO = I->getOperand(i);
-    if (MO.isReg())
+    if (MO.isRegister())
       Candidates.reset(MO.getReg());
   }
 
@@ -275,13 +276,13 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
 
   if (ScavengedReg != 0) {
     // First restore previously scavenged register.
-    RegInfo->loadRegFromStackSlot(*MBB, I, ScavengedReg,
+    TII->loadRegFromStackSlot(*MBB, I, ScavengedReg,
                                   ScavengingFrameIndex, ScavengedRC);
     MachineBasicBlock::iterator II = prior(I);
     RegInfo->eliminateFrameIndex(II, SPAdj, this);
   }
 
-  RegInfo->storeRegToStackSlot(*MBB, I, SReg, ScavengingFrameIndex, RC);
+  TII->storeRegToStackSlot(*MBB, I, SReg, true, ScavengingFrameIndex, RC);
   MachineBasicBlock::iterator II = prior(I);
   RegInfo->eliminateFrameIndex(II, SPAdj, this);
   ScavengedReg = SReg;