Correct swapped arguments to getConstant.

[oota-llvm.git] / lib / CodeGen / RegisterScavenging.cpp

diff --git a/lib/CodeGen/RegisterScavenging.cpp b/lib/CodeGen/RegisterScavenging.cpp
index 1555a63727a84c9cf8e85ce71c601fc4d2cb83a4..15592128480e2a2655f4f217489b196ea5334b91 100644 (file)
--- a/lib/CodeGen/RegisterScavenging.cpp
+++ b/lib/CodeGen/RegisterScavenging.cpp
@@ -102,7 +102,7 @@ void RegScavenger::forward() {
   BitVector ChangedRegs(NumPhysRegs);
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);
-    if (!MO.isReg() || !MO.isUse())
+    if (!MO.isRegister() || !MO.isUse())
       continue;
     unsigned Reg = MO.getReg();
     if (Reg == 0)
@@ -110,7 +110,7 @@ void RegScavenger::forward() {
     if (!isUsed(Reg)) {
       // Register has been scavenged. Restore it!
       if (Reg != ScavengedReg)
-        assert(false);
+        assert(false && "Using an undefined register!");
       else
         restoreScavengedReg();
     }
@@ -125,7 +125,7 @@ void RegScavenger::forward() {
   const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);
-    if (!MO.isReg() || !MO.isDef())
+    if (!MO.isRegister() || !MO.isDef())
       continue;
     unsigned Reg = MO.getReg();
     // If it's dead upon def, then it is now free.
@@ -135,10 +135,11 @@ void RegScavenger::forward() {
     }
     // Skip two-address destination operand.
     if (TID->findTiedToSrcOperand(i) != -1) {
-      assert(isUsed(Reg));
+      assert(isUsed(Reg) && "Using an undefined register!");
       continue;
     }
-    assert(isUnused(Reg) || isReserved(Reg));
+    assert((isUnused(Reg) || isReserved(Reg)) &&
+           "Re-defining a live register!");
     setUsed(Reg);
   }
 }
@@ -154,7 +155,7 @@ void RegScavenger::backward() {
   const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);
-    if (!MO.isReg() || !MO.isDef())
+    if (!MO.isRegister() || !MO.isDef())
       continue;
     // Skip two-address destination operand.
     if (TID->findTiedToSrcOperand(i) != -1)
@@ -169,7 +170,7 @@ void RegScavenger::backward() {
   BitVector ChangedRegs(NumPhysRegs);
   for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = MI->getOperand(i);
-    if (!MO.isReg() || !MO.isUse())
+    if (!MO.isRegister() || !MO.isUse())
       continue;
     unsigned Reg = MO.getReg();
     if (Reg == 0)
@@ -256,7 +257,7 @@ unsigned RegScavenger::scavengeRegister(const TargetRegisterClass *RC,
   // Exclude all the registers being used by the instruction.
   for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
     MachineOperand &MO = I->getOperand(i);
-    if (MO.isReg())
+    if (MO.isRegister())
       Candidates.reset(MO.getReg());
   }