// A = X
// B = A
// which allows us to coalesce A and B.
-// MI is the definition of B. LR is the life range of A that includes
+// VNI is the definition of B. LR is the life range of A that includes
// the slot just before B. If we return true, we add "B = X" to DupCopies.
static bool RegistersDefinedFromSameValue(LiveIntervals &li,
const TargetRegisterInfo &tri,
- CoalescerPair &CP, MachineInstr *MI,
+ CoalescerPair &CP,
+ VNInfo *VNI,
LiveRange *LR,
SmallVector<MachineInstr*, 8> &DupCopies) {
// FIXME: This is very conservative. For example, we don't handle
// physical registers.
+ MachineInstr *MI = VNI->getCopy();
+
if (!MI->isFullCopy() || CP.isPartial() || CP.isPhys())
return false;
// FIXME: If "B = X" kills X, we have to move the kill back to its
// previous use. For now we just avoid the optimization in that case.
- SlotIndex CopyIdx = li.getInstructionIndex(MI).getDefIndex();
LiveInterval &SrcInt = li.getInterval(Src);
- if (SrcInt.killedAt(CopyIdx))
+ if (SrcInt.killedAt(VNI->def))
return false;
if (!TargetRegisterInfo::isVirtualRegister(Src) ||
// from the RHS interval, we can use its value #.
MachineInstr *MI = VNI->getCopy();
if (!CP.isCoalescable(MI) &&
- !RegistersDefinedFromSameValue(*li_, *tri_, CP, MI, lr, DupCopies))
+ !RegistersDefinedFromSameValue(*li_, *tri_, CP, VNI, lr, DupCopies))
continue;
LHSValsDefinedFromRHS[VNI] = lr->valno;
// from the LHS interval, we can use its value #.
MachineInstr *MI = VNI->getCopy();
if (!CP.isCoalescable(MI) &&
- !RegistersDefinedFromSameValue(*li_, *tri_, CP, MI, lr, DupCopies))
+ !RegistersDefinedFromSameValue(*li_, *tri_, CP, VNI, lr, DupCopies))
continue;
RHSValsDefinedFromLHS[VNI] = lr->valno;