Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack

[oota-llvm.git] / lib / CodeGen / RegAllocSimple.cpp

diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index f08b039b82e8dc1e47461769831e042dc667172b..f49dd4c5cfbfd1ba2e2b57c8eff2f96bce45ad07 100644 (file)
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -27,22 +27,24 @@
 #include "llvm/Support/Compiler.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/ADT/STLExtras.h"
-#include <iostream>
 using namespace llvm;
 
-namespace {
-  static Statistic<> NumStores("ra-simple", "Number of stores added");
-  static Statistic<> NumLoads ("ra-simple", "Number of loads added");
+STATISTIC(NumStores, "Number of stores added");
+STATISTIC(NumLoads , "Number of loads added");
 
+namespace {
   static RegisterRegAlloc
     simpleRegAlloc("simple", "  simple register allocator",
                    createSimpleRegisterAllocator);
 
   class VISIBILITY_HIDDEN RegAllocSimple : public MachineFunctionPass {
+  public:
+    static char ID;
+    RegAllocSimple() : MachineFunctionPass((intptr_t)&ID) {}
+  private:
     MachineFunction *MF;
     const TargetMachine *TM;
     const MRegisterInfo *RegInfo;
-    bool *PhysRegsEverUsed;
 
     // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
     // these values are spilled
@@ -92,7 +94,7 @@ namespace {
     void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
                       unsigned VirtReg, unsigned PhysReg);
   };
-
+  char RegAllocSimple::ID = 0;
 }
 
 /// getStackSpaceFor - This allocates space for the specified virtual
@@ -127,7 +129,7 @@ unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
     unsigned PhysReg = *(RI+regIdx);
 
     if (!RegsUsed[PhysReg]) {
-      PhysRegsEverUsed[PhysReg] = true;
+      MF->setPhysRegUsed(PhysReg);
       return PhysReg;
     }
   }
@@ -179,7 +181,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
     if (Desc.ImplicitDefs) {
       for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) {
         RegsUsed[*Regs] = true;
-        PhysRegsEverUsed[*Regs] = true;
+        MF->setPhysRegUsed(*Regs);
       }
     }
 
@@ -192,15 +194,14 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
         unsigned virtualReg = (unsigned) op.getReg();
         DOUT << "op: " << op << "\n";
         DOUT << "\t inst[" << i << "]: ";
-        DEBUG(MI->print(std::cerr, TM));
+        DEBUG(MI->print(*cerr.stream(), TM));
 
         // make sure the same virtual register maps to the same physical
         // register in any given instruction
         unsigned physReg = Virt2PhysRegMap[virtualReg];
         if (physReg == 0) {
           if (op.isDef()) {
-            int TiedOp = TM->getInstrInfo()
-              ->findTiedToSrcOperand(MI->getOpcode(), i);
+            int TiedOp = MI->getInstrDescriptor()->findTiedToSrcOperand(i);
             if (TiedOp == -1) {
               physReg = getFreeReg(virtualReg);
             } else {
@@ -238,10 +239,6 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
   TM = &MF->getTarget();
   RegInfo = TM->getRegisterInfo();
 
-  PhysRegsEverUsed = new bool[RegInfo->getNumRegs()];
-  std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false);
-  Fn.setUsedPhysRegs(PhysRegsEverUsed);
-
   // Loop over all of the basic blocks, eliminating virtual register references
   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
        MBB != MBBe; ++MBB)