Fix a couple bugs in the const div stuff where we'd generate MULHS/MULHU

[oota-llvm.git] / lib / CodeGen / RegAllocSimple.cpp

diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp
index 0ddf7c2798abe470d915f18207f1fbca7bfda9f3..57f3f5d7723fae60a80b7aefc2915e7952cf1e1c 100644 (file)
--- a/lib/CodeGen/RegAllocSimple.cpp
+++ b/lib/CodeGen/RegAllocSimple.cpp
@@ -91,7 +91,7 @@ namespace {
 /// getStackSpaceFor - This allocates space for the specified virtual
 /// register to be held on the stack.
 int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
-                                    const TargetRegisterClass *RC) {
+                                     const TargetRegisterClass *RC) {
   // Find the location VirtReg would belong...
   std::map<unsigned, int>::iterator I =
     StackSlotForVirtReg.lower_bound(VirtReg);
@@ -135,7 +135,7 @@ unsigned RegAllocSimple::reloadVirtReg(MachineBasicBlock &MBB,
 
   // Add move instruction(s)
   ++NumLoads;
-  RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx);
+  RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
   return PhysReg;
 }
 
@@ -147,7 +147,7 @@ void RegAllocSimple::spillVirtReg(MachineBasicBlock &MBB,
 
   // Add move instruction(s)
   ++NumStores;
-  RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIdx);
+  RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIdx, RC);
 }