-//===-- RegAllocSimple.cpp - A simple generic register allocator --- ------===//
+//===-- RegAllocSimple.cpp - A simple generic register allocator ----------===//
//
-// This file implements a simple register allocator. *Very* simple.
+// This file implements a simple register allocator. *Very* simple: It immediate
+// spills every value right after it is computed, and it reloads all used
+// operands from the spill area to temporary registers before each instruction.
+// It does not keep values in registers across instructions.
//
//===----------------------------------------------------------------------===//
-#include "llvm/Function.h"
-#include "llvm/iTerminators.h"
-#include "llvm/Type.h"
-#include "llvm/Constants.h"
-#include "llvm/Pass.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/CodeGen/MachineInstrBuilder.h"
-#include "llvm/Target/MRegisterInfo.h"
-#include "llvm/Target/MachineRegInfo.h"
+#include "llvm/CodeGen/SSARegMap.h"
+#include "llvm/CodeGen/MachineFrameInfo.h"
+#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
-#include "llvm/Support/InstVisitor.h"
#include "Support/Statistic.h"
-#include <map>
+#include <iostream>
namespace {
- struct RegAllocSimple : public FunctionPass {
- TargetMachine &TM;
- MachineBasicBlock *CurrMBB;
+ Statistic<> NumSpilled ("ra-simple", "Number of registers spilled");
+ Statistic<> NumReloaded("ra-simple", "Number of registers reloaded");
+
+ class RegAllocSimple : public MachineFunctionPass {
MachineFunction *MF;
- unsigned maxOffset;
+ const TargetMachine *TM;
const MRegisterInfo *RegInfo;
- unsigned NumBytesAllocated, ByteAlignment;
- // Maps SSA Regs => offsets on the stack where these values are stored
- std::map<unsigned, unsigned> RegMap; // FIXME: change name to OffsetMap
+ // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where
+ // these values are spilled
+ std::map<unsigned, int> StackSlotForVirtReg;
- // Maps SSA Regs => physical regs
- std::map<unsigned, unsigned> SSA2PhysRegMap;
-
- // Maps RegClass => which index we can take a register from. Since this is a
- // simple register allocator, when we need a register of a certain class, we
- // just take the next available one.
- std::map<unsigned, unsigned> RegsUsed;
+ // RegsUsed - Keep track of what registers are currently in use. This is a
+ // bitset.
+ std::vector<bool> RegsUsed;
+
+ // RegClassIdx - Maps RegClass => which index we can take a register
+ // from. Since this is a simple register allocator, when we need a register
+ // of a certain class, we just take the next available one.
std::map<const TargetRegisterClass*, unsigned> RegClassIdx;
- RegAllocSimple(TargetMachine &tm) : TM(tm), CurrMBB(0), maxOffset(0),
- RegInfo(tm.getRegisterInfo()),
- NumBytesAllocated(0), ByteAlignment(4)
- {
- RegsUsed[RegInfo->getFramePointer()] = 1;
- RegsUsed[RegInfo->getStackPointer()] = 1;
+ public:
+ virtual const char *getPassName() const {
+ return "Simple Register Allocator";
}
- bool isAvailableReg(unsigned Reg) {
- // assert(Reg < MRegisterInfo::FirstVirtualReg && "...");
- return RegsUsed.find(Reg) == RegsUsed.end();
+ /// runOnMachineFunction - Register allocate the whole function
+ bool runOnMachineFunction(MachineFunction &Fn);
+
+ virtual void getAnalysisUsage(AnalysisUsage &AU) const {
+ AU.addRequiredID(PHIEliminationID); // Eliminate PHI nodes
+ MachineFunctionPass::getAnalysisUsage(AU);
}
+ private:
+ /// AllocateBasicBlock - Register allocate the specified basic block.
+ void AllocateBasicBlock(MachineBasicBlock &MBB);
+
+ /// getStackSpaceFor - This returns the offset of the specified virtual
+ /// register on the stack, allocating space if neccesary.
+ int getStackSpaceFor(unsigned VirtReg, const TargetRegisterClass *RC);
- /// Given size (in bytes), returns a register that is currently unused
+ /// Given a virtual register, return a compatible physical register that is
+ /// currently unused.
+ ///
/// Side effect: marks that register as being used until manually cleared
+ ///
unsigned getFreeReg(unsigned virtualReg);
- /// Returns all `borrowed' registers back to the free pool
- void clearAllRegs() {
- RegClassIdx.clear();
- }
-
/// Moves value from memory into that register
- MachineBasicBlock::iterator
- moveUseToReg (MachineBasicBlock::iterator I, unsigned VirtReg,
- unsigned &PhysReg);
+ unsigned reloadVirtReg(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &I, unsigned VirtReg);
/// Saves reg value on the stack (maps virtual register to stack value)
- MachineBasicBlock::iterator
- saveRegToStack (MachineBasicBlock::iterator I, unsigned VirtReg,
- unsigned PhysReg);
+ void spillVirtReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
+ unsigned VirtReg, unsigned PhysReg);
+ };
- /// runOnFunction - Top level implementation of instruction selection for
- /// the entire function.
- ///
- bool runOnMachineFunction(MachineFunction &Fn);
+}
- bool runOnFunction(Function &Fn) {
- return runOnMachineFunction(MachineFunction::get(&Fn));
- }
- };
+/// getStackSpaceFor - This allocates space for the specified virtual
+/// register to be held on the stack.
+int RegAllocSimple::getStackSpaceFor(unsigned VirtReg,
+ const TargetRegisterClass *RC) {
+ // Find the location VirtReg would belong...
+ std::map<unsigned, int>::iterator I =
+ StackSlotForVirtReg.lower_bound(VirtReg);
+
+ if (I != StackSlotForVirtReg.end() && I->first == VirtReg)
+ return I->second; // Already has space allocated?
+
+ // Allocate a new stack object for this spill location...
+ int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
+
+ // Assign the slot...
+ StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
+ return FrameIdx;
}
unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) {
- const TargetRegisterClass* regClass = MF->getRegClass(virtualReg);
- unsigned physReg;
- assert(regClass);
- if (RegClassIdx.find(regClass) != RegClassIdx.end()) {
- unsigned regIdx = RegClassIdx[regClass]++;
- assert(regIdx < regClass->getNumRegs() && "Not enough registers!");
- physReg = regClass->getRegister(regIdx);
- } else {
- physReg = regClass->getRegister(0);
- // assert(physReg < regClass->getNumRegs() && "No registers in class!");
- RegClassIdx[regClass] = 1;
- }
-
- if (isAvailableReg(physReg))
- return physReg;
- else {
- return getFreeReg(virtualReg);
+ const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(virtualReg);
+ TargetRegisterClass::iterator RI = RC->allocation_order_begin(*MF);
+ TargetRegisterClass::iterator RE = RC->allocation_order_end(*MF);
+
+ while (1) {
+ unsigned regIdx = RegClassIdx[RC]++;
+ assert(RI+regIdx != RE && "Not enough registers!");
+ unsigned PhysReg = *(RI+regIdx);
+
+ if (!RegsUsed[PhysReg])
+ return PhysReg;
}
}
-MachineBasicBlock::iterator
-RegAllocSimple::moveUseToReg (MachineBasicBlock::iterator I,
- unsigned VirtReg, unsigned &PhysReg)
-{
- const TargetRegisterClass* regClass = MF->getRegClass(VirtReg);
- assert(regClass);
-
- unsigned stackOffset;
- if (RegMap.find(VirtReg) == RegMap.end()) {
- unsigned size = regClass->getDataSize();
- unsigned over = NumBytesAllocated - (NumBytesAllocated % ByteAlignment);
- if (size >= ByteAlignment - over) {
- // need to pad by (ByteAlignment - over)
- NumBytesAllocated += ByteAlignment - over;
- }
- RegMap[VirtReg] = NumBytesAllocated;
- NumBytesAllocated += size;
- }
- stackOffset = RegMap[VirtReg];
- PhysReg = getFreeReg(VirtReg);
+unsigned RegAllocSimple::reloadVirtReg(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &I,
+ unsigned VirtReg) {
+ const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(VirtReg);
+ int FrameIdx = getStackSpaceFor(VirtReg, RC);
+ unsigned PhysReg = getFreeReg(VirtReg);
// Add move instruction(s)
- MachineBasicBlock::iterator newI =
- RegInfo->loadRegOffset2Reg(CurrMBB, I, PhysReg,
- RegInfo->getFramePointer(),
- stackOffset, regClass->getDataSize());
-
- // FIXME: increment the frame pointer
-
- return newI;
+ ++NumReloaded;
+ RegInfo->loadRegFromStackSlot(MBB, I, PhysReg, FrameIdx, RC);
+ return PhysReg;
}
-MachineBasicBlock::iterator
-RegAllocSimple::saveRegToStack (MachineBasicBlock::iterator I,
- unsigned VirtReg, unsigned PhysReg)
-{
- const TargetRegisterClass* regClass = MF->getRegClass(VirtReg);
- assert(regClass);
- assert(RegMap.find(VirtReg) != RegMap.end() &&
- "Virtual reg has no stack offset mapping!");
+void RegAllocSimple::spillVirtReg(MachineBasicBlock &MBB,
+ MachineBasicBlock::iterator &I,
+ unsigned VirtReg, unsigned PhysReg) {
+ const TargetRegisterClass* RC = MF->getSSARegMap()->getRegClass(VirtReg);
+ int FrameIdx = getStackSpaceFor(VirtReg, RC);
- unsigned offset = RegMap[VirtReg];
// Add move instruction(s)
- return RegInfo->storeReg2RegOffset(CurrMBB, I, PhysReg,
- RegInfo->getFramePointer(),
- offset, regClass->getDataSize());
+ ++NumSpilled;
+ RegInfo->storeRegToStackSlot(MBB, I, PhysReg, FrameIdx, RC);
}
-bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
- RegMap.clear();
- unsigned virtualReg, physReg;
- DEBUG(std::cerr << "Machine Function " << "\n");
- MF = &Fn;
- // FIXME: add prolog. we should preserve callee-save registers...
- for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
- MBB != MBBe; ++MBB)
- {
- CurrMBB = &(*MBB);
-
- // FIXME: if return, special case => into return register
- //loop over each basic block
- for (MachineBasicBlock::iterator I = MBB->begin(); I != MBB->end(); ++I)
- {
- MachineInstr *MI = *I;
-
- DEBUG(std::cerr << "instr: ";
- MI->print(std::cerr, TM));
-
- // Loop over each instruction:
- // uses, move from memory into registers
- for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
- MachineOperand &op = MI->getOperand(i);
-
- if (op.getType() == MachineOperand::MO_SignExtendedImmed ||
- op.getType() == MachineOperand::MO_UnextendedImmed)
- {
- DEBUG(std::cerr << "const\n");
- } else if (op.isVirtualRegister()) {
- virtualReg = (unsigned) op.getAllocatedRegNum();
-#if 0
- // FIXME: save register to stack
- if (op.opIsDef()) {
- MachineBasicBlock::iterator J = I;
- saveRegToStack(++J, virtualReg, physReg);
+void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
+ // loop over each instruction
+ for (MachineBasicBlock::iterator I = MBB.begin(); I != MBB.end(); ++I) {
+ // Made to combat the incorrect allocation of r2 = add r1, r1
+ std::map<unsigned, unsigned> Virt2PhysRegMap;
+
+ MachineInstr *MI = *I;
+
+ RegsUsed.resize(MRegisterInfo::FirstVirtualRegister);
+
+ // a preliminary pass that will invalidate any registers that
+ // are used by the instruction (including implicit uses)
+ unsigned Opcode = MI->getOpcode();
+ const TargetInstrDescriptor &Desc = TM->getInstrInfo().get(Opcode);
+ if (const unsigned *Regs = Desc.ImplicitUses)
+ while (*Regs)
+ RegsUsed[*Regs++] = true;
+
+ if (const unsigned *Regs = Desc.ImplicitDefs)
+ while (*Regs)
+ RegsUsed[*Regs++] = true;
+
+ // Loop over uses, move from memory into registers
+ for (int i = MI->getNumOperands() - 1; i >= 0; --i) {
+ MachineOperand &op = MI->getOperand(i);
+
+ if (op.isVirtualRegister()) {
+ unsigned virtualReg = (unsigned) op.getAllocatedRegNum();
+ DEBUG(std::cerr << "op: " << op << "\n");
+ DEBUG(std::cerr << "\t inst[" << i << "]: ";
+ MI->print(std::cerr, *TM));
+
+ // make sure the same virtual register maps to the same physical
+ // register in any given instruction
+ unsigned physReg = Virt2PhysRegMap[virtualReg];
+ if (physReg == 0) {
+ if (op.opIsDefOnly() || op.opIsDefAndUse()) {
+ if (TM->getInstrInfo().isTwoAddrInstr(MI->getOpcode()) && i == 0) {
+ // must be same register number as the first operand
+ // This maps a = b + c into b += c, and saves b into a's spot
+ assert(MI->getOperand(1).isRegister() &&
+ MI->getOperand(1).getAllocatedRegNum() &&
+ MI->getOperand(1).opIsUse() &&
+ "Two address instruction invalid!");
+
+ physReg = MI->getOperand(1).getAllocatedRegNum();
+ } else {
+ physReg = getFreeReg(virtualReg);
+ }
+ ++I;
+ spillVirtReg(MBB, I, virtualReg, physReg);
+ --I;
+ } else {
+ physReg = reloadVirtReg(MBB, I, virtualReg);
+ Virt2PhysRegMap[virtualReg] = physReg;
}
-#endif
- DEBUG(std::cerr << "op: " << op << "\n");
- DEBUG(std::cerr << "\t inst[" << i << "]: ";
- MI->print(std::cerr, TM));
- I = moveUseToReg(I, virtualReg, physReg);
- //MI = *I;
- bool def = op.opIsDef() || op.opIsDefAndUse();
- MI->SetMachineOperandReg(i, physReg, def);
- DEBUG(std::cerr << "virt: " << virtualReg <<
- ", phys: " << op.getAllocatedRegNum() << "\n");
}
+ MI->SetMachineOperandReg(i, physReg);
+ DEBUG(std::cerr << "virt: " << virtualReg <<
+ ", phys: " << op.getAllocatedRegNum() << "\n");
}
-
- clearAllRegs();
}
-
+ RegClassIdx.clear();
+ RegsUsed.clear();
}
+}
+
- // FIXME: add epilog. we should preserve callee-save registers...
+/// runOnMachineFunction - Register allocate the whole function
+///
+bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
+ DEBUG(std::cerr << "Machine Function " << "\n");
+ MF = &Fn;
+ TM = &MF->getTarget();
+ RegInfo = TM->getRegisterInfo();
+
+ // Loop over all of the basic blocks, eliminating virtual register references
+ for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
+ MBB != MBBe; ++MBB)
+ AllocateBasicBlock(*MBB);
- return false; // We never modify the LLVM itself.
+ StackSlotForVirtReg.clear();
+ return true;
}
-Pass *createSimpleX86RegisterAllocator(TargetMachine &TM) {
- return new RegAllocSimple(TM);
+Pass *createSimpleRegisterAllocator() {
+ return new RegAllocSimple();
}
projects / oota-llvm.git / blobdiff