#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
-#include "Support/CommandLine.h"
-#include "Support/Debug.h"
-#include "Support/DenseMap.h"
-#include "Support/Statistic.h"
+#include "llvm/Support/CommandLine.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/Statistic.h"
+#include <algorithm>
#include <iostream>
using namespace llvm;
MachineFunction *MF;
const MRegisterInfo *RegInfo;
LiveVariables *LV;
+ bool *PhysRegsEverUsed;
// StackSlotForVirtReg - Maps virtual regs to the frame index where these
// values are spilled.
}
void MarkPhysRegRecentlyUsed(unsigned Reg) {
- assert(!PhysRegsUseOrder.empty() && "No registers used!");
- if (PhysRegsUseOrder.back() == Reg) return; // Already most recently used
+ if(PhysRegsUseOrder.empty() ||
+ PhysRegsUseOrder.back() == Reg) return; // Already most recently used
for (unsigned i = PhysRegsUseOrder.size(); i != 0; --i)
if (areRegsEqual(Reg, PhysRegsUseOrder[i-1])) {
///
MachineInstr *reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI,
unsigned OpNum);
-
+
void reloadPhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
unsigned PhysReg);
return I->second; // Already has space allocated?
// Allocate a new stack object for this spill location...
- int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC);
+ int FrameIdx = MF->getFrameInfo()->CreateStackObject(RC->getSize(),
+ RC->getAlignment());
// Assign the slot...
StackSlotForVirtReg.insert(I, std::make_pair(VirtReg, FrameIdx));
///
void RA::liberatePhysReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator &I,
unsigned PhysReg) {
- // FIXME: This code checks to see if a register is available, but it really
- // wants to know if a reg is available BEFORE the instruction executes. If
- // called after killed operands are freed, it runs the risk of reallocating a
- // used operand...
-#if 0
- if (isPhysRegAvailable(PhysReg)) return; // Already available...
-
- // Check to see if the register is directly used, not indirectly used through
- // aliases. If aliased registers are the ones actually used, we cannot be
- // sure that we will be able to save the whole thing if we do a reg-reg copy.
- if (PhysRegsUsed[PhysReg] != -1) {
- // The virtual register held...
- unsigned VirtReg = PhysRegsUsed[PhysReg]->second;
-
- // Check to see if there is a compatible register available. If so, we can
- // move the value into the new register...
- //
- const TargetRegisterClass *RC = RegInfo->getRegClass(PhysReg);
- if (unsigned NewReg = getFreeReg(RC)) {
- // Emit the code to copy the value...
- RegInfo->copyRegToReg(MBB, I, NewReg, PhysReg, RC);
-
- // Update our internal state to indicate that PhysReg is available and Reg
- // isn't.
- getVirt2PhysRegMapSlot[VirtReg] = 0;
- removePhysReg(PhysReg); // Free the physreg
-
- // Move reference over to new register...
- assignVirtToPhysReg(VirtReg, NewReg);
- return;
- }
- }
-#endif
spillPhysReg(MBB, I, PhysReg);
}
"PhysReg in PhysRegsUseOrder, but is not allocated?");
if (PhysRegsUsed[R]) {
// If the current register is compatible, use it.
- if (RegInfo->getRegClass(R) == RC) {
+ if (RC->contains(R)) {
PhysReg = R;
break;
} else {
// compatible, use it.
for (const unsigned *AliasSet = RegInfo->getAliasSet(R);
*AliasSet; ++AliasSet) {
- if (RegInfo->getRegClass(*AliasSet) == RC) {
+ if (RC->contains(*AliasSet)) {
PhysReg = *AliasSet; // Take an aliased register
break;
}
// and return.
if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
MarkPhysRegRecentlyUsed(PR); // Already have this value available!
- MI->SetMachineOperandReg(OpNum, PR); // Assign the input register
+ MI->getOperand(OpNum).setReg(PR); // Assign the input register
return MI;
}
RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC);
++NumLoads; // Update statistics
- MI->SetMachineOperandReg(OpNum, PhysReg); // Assign the input register
+ PhysRegsEverUsed[PhysReg] = true;
+ MI->getOperand(OpNum).setReg(PhysReg); // Assign the input register
return MI;
}
void RA::AllocateBasicBlock(MachineBasicBlock &MBB) {
// loop over each instruction
- MachineBasicBlock::iterator MI = MBB.begin();
- for (; MI != MBB.end(); ++MI) {
- const TargetInstrDescriptor &TID = TM->getInstrInfo().get(MI->getOpcode());
+ MachineBasicBlock::iterator MII = MBB.begin();
+ const TargetInstrInfo &TII = *TM->getInstrInfo();
+ while (MII != MBB.end()) {
+ MachineInstr *MI = MII++;
+ const TargetInstrDescriptor &TID = TII.get(MI->getOpcode());
DEBUG(std::cerr << "\nStarting RegAlloc of: " << *MI;
std::cerr << " Regs have values: ";
for (unsigned i = 0; i != RegInfo->getNumRegs(); ++i)
//
for (LiveVariables::killed_iterator KI = LV->killed_begin(MI),
KE = LV->killed_end(MI); KI != KE; ++KI) {
- unsigned VirtReg = KI->second;
+ unsigned VirtReg = *KI;
unsigned PhysReg = VirtReg;
if (MRegisterInfo::isVirtualRegister(VirtReg)) {
// If the virtual register was never materialized into a register, it
if (MO.isDef() && MO.isRegister() && MO.getReg() &&
MRegisterInfo::isPhysicalRegister(MO.getReg())) {
unsigned Reg = MO.getReg();
+ PhysRegsEverUsed[Reg] = true;
spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in the reg
PhysRegsUsed[Reg] = 0; // It is free and reserved now
PhysRegsUseOrder.push_back(Reg);
*AliasSet; ++AliasSet) {
PhysRegsUseOrder.push_back(*AliasSet);
PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
+ PhysRegsEverUsed[*AliasSet] = true;
}
}
}
spillPhysReg(MBB, MI, Reg, true);
PhysRegsUseOrder.push_back(Reg);
PhysRegsUsed[Reg] = 0; // It is free and reserved now
+ PhysRegsEverUsed[Reg] = true;
+
for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg);
*AliasSet; ++AliasSet) {
PhysRegsUseOrder.push_back(*AliasSet);
PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now
+ PhysRegsEverUsed[*AliasSet] = true;
}
}
// Okay, we have allocated all of the source operands and spilled any values
// that would be destroyed by defs of this instruction. Loop over the
- // implicit defs and assign them to a register, spilling incoming values if
+ // explicit defs and assign them to a register, spilling incoming values if
// we need to scavenge a register.
//
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
// If DestVirtReg already has a value, use it.
if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg)))
DestPhysReg = getReg(MBB, MI, DestVirtReg);
+ PhysRegsEverUsed[DestPhysReg] = true;
markVirtRegModified(DestVirtReg);
- MI->SetMachineOperandReg(i, DestPhysReg); // Assign the output register
+ MI->getOperand(i).setReg(DestPhysReg); // Assign the output register
}
}
//
for (LiveVariables::killed_iterator KI = LV->dead_begin(MI),
KE = LV->dead_end(MI); KI != KE; ++KI) {
- unsigned VirtReg = KI->second;
+ unsigned VirtReg = *KI;
unsigned PhysReg = VirtReg;
if (MRegisterInfo::isVirtualRegister(VirtReg)) {
unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
removePhysReg(PhysReg);
}
}
+
+ // Finally, if this is a noop copy instruction, zap it.
+ unsigned SrcReg, DstReg;
+ if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg)
+ MBB.erase(MI);
}
- MI = MBB.getFirstTerminator();
+ MachineBasicBlock::iterator MI = MBB.getFirstTerminator();
// Spill all physical registers holding virtual registers now.
for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
else
removePhysReg(i);
-#ifndef NDEBUG
+#if 0
+ // This checking code is very expensive.
bool AllOk = true;
for (unsigned i = MRegisterInfo::FirstVirtualRegister,
e = MF->getSSARegMap()->getLastVirtReg(); i <= e; ++i)
RegInfo = TM->getRegisterInfo();
LV = &getAnalysis<LiveVariables>();
+ PhysRegsEverUsed = new bool[RegInfo->getNumRegs()];
+ std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false);
+ Fn.setUsedPhysRegs(PhysRegsEverUsed);
+
PhysRegsUsed.assign(RegInfo->getNumRegs(), -1);
// initialize the virtual->physical register map to have a 'null'
projects / oota-llvm.git / blobdiff