#define DEBUG_TYPE "regalloc"
#include "llvm/BasicBlock.h"
-#include "llvm/CodeGen/Passes.h"
+#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/LiveVariables.h"
+#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/RegAllocRegistry.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/ADT/IndexedMap.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/Statistic.h"
+#include "llvm/ADT/STLExtras.h"
#include <algorithm>
+#include <map>
using namespace llvm;
STATISTIC(NumStores, "Number of stores added");
STATISTIC(NumLoads , "Number of loads added");
-STATISTIC(NumFolded, "Number of loads/stores folded into instructions");
-
-namespace {
- static RegisterRegAlloc
- localRegAlloc("local", " local register allocator",
- createLocalRegisterAllocator);
+static RegisterRegAlloc
+ localRegAlloc("local", " local register allocator",
+ createLocalRegisterAllocator);
+namespace {
class VISIBILITY_HIDDEN RALocal : public MachineFunctionPass {
public:
static char ID;
private:
const TargetMachine *TM;
MachineFunction *MF;
- const MRegisterInfo *MRI;
+ const TargetRegisterInfo *TRI;
const TargetInstrInfo *TII;
- LiveVariables *LV;
// StackSlotForVirtReg - Maps virtual regs to the frame index where these
// values are spilled.
//
std::vector<unsigned> PhysRegsUseOrder;
+ // Virt2LastUseMap - This maps each virtual register to its last use
+ // (MachineInstr*, operand index pair).
+ IndexedMap<std::pair<MachineInstr*, unsigned>, VirtReg2IndexFunctor>
+ Virt2LastUseMap;
+
+ std::pair<MachineInstr*,unsigned>& getVirtRegLastUse(unsigned Reg) {
+ assert(TargetRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
+ return Virt2LastUseMap[Reg];
+ }
+
// VirtRegModified - This bitset contains information about which virtual
// registers need to be spilled back to memory when their registers are
// scavenged. If a virtual register has simply been rematerialized, there
// is no reason to spill it to memory when we need the register back.
//
- std::vector<bool> VirtRegModified;
+ BitVector VirtRegModified;
void markVirtRegModified(unsigned Reg, bool Val = true) {
- assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
- Reg -= MRegisterInfo::FirstVirtualRegister;
- if (VirtRegModified.size() <= Reg) VirtRegModified.resize(Reg+1);
- VirtRegModified[Reg] = Val;
+ assert(TargetRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
+ Reg -= TargetRegisterInfo::FirstVirtualRegister;
+ if (Val)
+ VirtRegModified.set(Reg);
+ else
+ VirtRegModified.reset(Reg);
}
bool isVirtRegModified(unsigned Reg) const {
- assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
- assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
+ assert(TargetRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
+ assert(Reg - TargetRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
&& "Illegal virtual register!");
- return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
+ return VirtRegModified[Reg - TargetRegisterInfo::FirstVirtualRegister];
}
void AddToPhysRegsUseOrder(unsigned Reg) {
///
bool areRegsEqual(unsigned R1, unsigned R2) const {
if (R1 == R2) return true;
- for (const unsigned *AliasSet = MRI->getAliasSet(R2);
+ for (const unsigned *AliasSet = TRI->getAliasSet(R2);
*AliasSet; ++AliasSet) {
if (*AliasSet == R1) return true;
}
assert(VirtReg && "Spilling a physical register is illegal!"
" Must not have appropriate kill for the register or use exists beyond"
" the intended one.");
- DOUT << " Spilling register " << MRI->getName(PhysReg)
+ DOUT << " Spilling register " << TRI->getName(PhysReg)
<< " containing %reg" << VirtReg;
const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
- if (!isVirtRegModified(VirtReg))
+ if (!isVirtRegModified(VirtReg)) {
DOUT << " which has not been modified, so no store necessary!";
-
- // Otherwise, there is a virtual register corresponding to this physical
- // register. We only need to spill it into its stack slot if it has been
- // modified.
- if (isVirtRegModified(VirtReg)) {
+ std::pair<MachineInstr*, unsigned> &LastUse = getVirtRegLastUse(VirtReg);
+ if (LastUse.first)
+ LastUse.first->getOperand(LastUse.second).setIsKill();
+ } else {
+ // Otherwise, there is a virtual register corresponding to this physical
+ // register. We only need to spill it into its stack slot if it has been
+ // modified.
const TargetRegisterClass *RC = MF->getRegInfo().getRegClass(VirtReg);
int FrameIndex = getStackSpaceFor(VirtReg, RC);
DOUT << " to stack slot #" << FrameIndex;
- TII->storeRegToStackSlot(MBB, I, PhysReg, true, FrameIndex, RC);
+ // If the instruction reads the register that's spilled, (e.g. this can
+ // happen if it is a move to a physical register), then the spill
+ // instruction is not a kill.
+ bool isKill = !(I != MBB.end() && I->readsRegister(PhysReg));
+ TII->storeRegToStackSlot(MBB, I, PhysReg, isKill, FrameIndex, RC);
++NumStores; // Update statistics
}
} else {
// If the selected register aliases any other registers, we must make
// sure that one of the aliases isn't alive.
- for (const unsigned *AliasSet = MRI->getAliasSet(PhysReg);
+ for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg);
*AliasSet; ++AliasSet)
if (PhysRegsUsed[*AliasSet] != -1 && // Spill aliased register.
PhysRegsUsed[*AliasSet] != -2) // If allocatable.
// If the selected register aliases any other allocated registers, it is
// not free!
- for (const unsigned *AliasSet = MRI->getAliasSet(PhysReg);
+ for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg);
*AliasSet; ++AliasSet)
- if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
+ if (PhysRegsUsed[*AliasSet] >= 0) // Aliased register in use?
return false; // Can't use this reg then.
return true;
}
} else {
// If one of the registers aliased to the current register is
// compatible, use it.
- for (const unsigned *AliasIt = MRI->getAliasSet(R);
+ for (const unsigned *AliasIt = TRI->getAliasSet(R);
*AliasIt; ++AliasIt) {
if (RC->contains(*AliasIt) &&
// If this is pinned down for some reason, don't use it. For
// If the virtual register is already available, just update the instruction
// and return.
if (unsigned PR = getVirt2PhysRegMapSlot(VirtReg)) {
- MarkPhysRegRecentlyUsed(PR); // Already have this value available!
+ MarkPhysRegRecentlyUsed(PR); // Already have this value available!
MI->getOperand(OpNum).setReg(PR); // Assign the input register
+ getVirtRegLastUse(VirtReg) = std::make_pair(MI, OpNum);
return MI;
}
if (PhysReg) { // Register is available, allocate it!
assignVirtToPhysReg(VirtReg, PhysReg);
} else { // No registers available.
- // If we can fold this spill into this instruction, do so now.
- SmallVector<unsigned, 2> Ops;
- Ops.push_back(OpNum);
- if (MachineInstr* FMI = TII->foldMemoryOperand(MI, Ops, FrameIndex)) {
- ++NumFolded;
- // Since we changed the address of MI, make sure to update live variables
- // to know that the new instruction has the properties of the old one.
- LV->instructionChanged(MI, FMI);
- return MBB.insert(MBB.erase(MI), FMI);
- }
-
- // It looks like we can't fold this virtual register load into this
- // instruction. Force some poor hapless value out of the register file to
+ // Force some poor hapless value out of the register file to
// make room for the new register, and reload it.
PhysReg = getReg(MBB, MI, VirtReg);
}
markVirtRegModified(VirtReg, false); // Note that this reg was just reloaded
DOUT << " Reloading %reg" << VirtReg << " into "
- << MRI->getName(PhysReg) << "\n";
+ << TRI->getName(PhysReg) << "\n";
// Add move instruction(s)
const TargetInstrInfo* TII = MBB.getParent()->getTarget().getInstrInfo();
MF->getRegInfo().setPhysRegUsed(PhysReg);
MI->getOperand(OpNum).setReg(PhysReg); // Assign the input register
+ getVirtRegLastUse(VirtReg) = std::make_pair(MI, OpNum);
return MI;
}
MF->getRegInfo().setPhysRegUsed(Reg);
PhysRegsUsed[Reg] = 0; // It is free and reserved now
AddToPhysRegsUseOrder(Reg);
- for (const unsigned *AliasSet = MRI->getSubRegisters(Reg);
+ for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
*AliasSet; ++AliasSet) {
if (PhysRegsUsed[*AliasSet] != -2) {
AddToPhysRegsUseOrder(*AliasSet);
// Otherwise, sequentially allocate each instruction in the MBB.
while (MII != MBB.end()) {
MachineInstr *MI = MII++;
- const TargetInstrDescriptor &TID = TII.get(MI->getOpcode());
+ const TargetInstrDesc &TID = MI->getDesc();
DEBUG(DOUT << "\nStarting RegAlloc of: " << *MI;
DOUT << " Regs have values: ";
- for (unsigned i = 0; i != MRI->getNumRegs(); ++i)
+ for (unsigned i = 0; i != TRI->getNumRegs(); ++i)
if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
- DOUT << "[" << MRI->getName(i)
+ DOUT << "[" << TRI->getName(i)
<< ",%reg" << PhysRegsUsed[i] << "] ";
DOUT << "\n");
MachineOperand& MO = MI->getOperand(i);
// here we are looking for only used operands (never def&use)
if (MO.isRegister() && !MO.isDef() && MO.getReg() && !MO.isImplicit() &&
- MRegisterInfo::isVirtualRegister(MO.getReg()))
+ TargetRegisterInfo::isVirtualRegister(MO.getReg()))
MI = reloadVirtReg(MBB, MI, i);
}
for (unsigned i = 0, e = Kills.size(); i != e; ++i) {
unsigned VirtReg = Kills[i];
unsigned PhysReg = VirtReg;
- if (MRegisterInfo::isVirtualRegister(VirtReg)) {
+ if (TargetRegisterInfo::isVirtualRegister(VirtReg)) {
// If the virtual register was never materialized into a register, it
// might not be in the map, but it won't hurt to zero it out anyway.
unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
}
if (PhysReg) {
- DOUT << " Last use of " << MRI->getName(PhysReg)
+ DOUT << " Last use of " << TRI->getName(PhysReg)
<< "[%reg" << VirtReg <<"], removing it from live set\n";
removePhysReg(PhysReg);
- for (const unsigned *AliasSet = MRI->getSubRegisters(PhysReg);
+ for (const unsigned *AliasSet = TRI->getSubRegisters(PhysReg);
*AliasSet; ++AliasSet) {
if (PhysRegsUsed[*AliasSet] != -2) {
DOUT << " Last use of "
- << MRI->getName(*AliasSet)
+ << TRI->getName(*AliasSet)
<< "[%reg" << VirtReg <<"], removing it from live set\n";
removePhysReg(*AliasSet);
}
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand& MO = MI->getOperand(i);
if (MO.isRegister() && MO.isDef() && !MO.isImplicit() && MO.getReg() &&
- MRegisterInfo::isPhysicalRegister(MO.getReg())) {
+ TargetRegisterInfo::isPhysicalRegister(MO.getReg())) {
unsigned Reg = MO.getReg();
if (PhysRegsUsed[Reg] == -2) continue; // Something like ESP.
// These are extra physical register defs when a sub-register
PhysRegsUsed[Reg] = 0; // It is free and reserved now
AddToPhysRegsUseOrder(Reg);
- for (const unsigned *AliasSet = MRI->getSubRegisters(Reg);
+ for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
*AliasSet; ++AliasSet) {
if (PhysRegsUsed[*AliasSet] != -2) {
MF->getRegInfo().setPhysRegUsed(*AliasSet);
PhysRegsUsed[Reg] = 0; // It is free and reserved now
}
MF->getRegInfo().setPhysRegUsed(Reg);
- for (const unsigned *AliasSet = MRI->getSubRegisters(Reg);
+ for (const unsigned *AliasSet = TRI->getSubRegisters(Reg);
*AliasSet; ++AliasSet) {
if (PhysRegsUsed[*AliasSet] != -2) {
AddToPhysRegsUseOrder(*AliasSet);
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand& MO = MI->getOperand(i);
if (MO.isRegister() && MO.isDef() && MO.getReg() &&
- MRegisterInfo::isVirtualRegister(MO.getReg())) {
+ TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
unsigned DestVirtReg = MO.getReg();
unsigned DestPhysReg;
DestPhysReg = getReg(MBB, MI, DestVirtReg);
MF->getRegInfo().setPhysRegUsed(DestPhysReg);
markVirtRegModified(DestVirtReg);
+ getVirtRegLastUse(DestVirtReg) = std::make_pair((MachineInstr*)0, 0);
+ DOUT << " Assigning " << TRI->getName(DestPhysReg)
+ << " to %reg" << DestVirtReg << "\n";
MI->getOperand(i).setReg(DestPhysReg); // Assign the output register
}
}
for (unsigned i = 0, e = DeadDefs.size(); i != e; ++i) {
unsigned VirtReg = DeadDefs[i];
unsigned PhysReg = VirtReg;
- if (MRegisterInfo::isVirtualRegister(VirtReg)) {
+ if (TargetRegisterInfo::isVirtualRegister(VirtReg)) {
unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
PhysReg = PhysRegSlot;
assert(PhysReg != 0);
}
if (PhysReg) {
- DOUT << " Register " << MRI->getName(PhysReg)
+ DOUT << " Register " << TRI->getName(PhysReg)
<< " [%reg" << VirtReg
<< "] is never used, removing it frame live list\n";
removePhysReg(PhysReg);
- for (const unsigned *AliasSet = MRI->getAliasSet(PhysReg);
+ for (const unsigned *AliasSet = TRI->getAliasSet(PhysReg);
*AliasSet; ++AliasSet) {
if (PhysRegsUsed[*AliasSet] != -2) {
- DOUT << " Register " << MRI->getName(*AliasSet)
+ DOUT << " Register " << TRI->getName(*AliasSet)
<< " [%reg" << *AliasSet
<< "] is never used, removing it frame live list\n";
removePhysReg(*AliasSet);
// Finally, if this is a noop copy instruction, zap it.
unsigned SrcReg, DstReg;
- if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg) {
- LV->removeVirtualRegistersKilled(MI);
- LV->removeVirtualRegistersDead(MI);
+ if (TII.isMoveInstr(*MI, SrcReg, DstReg) && SrcReg == DstReg)
MBB.erase(MI);
- }
}
MachineBasicBlock::iterator MI = MBB.getFirstTerminator();
// Spill all physical registers holding virtual registers now.
- for (unsigned i = 0, e = MRI->getNumRegs(); i != e; ++i)
- if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
+ for (unsigned i = 0, e = TRI->getNumRegs(); i != e; ++i)
+ if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2) {
if (unsigned VirtReg = PhysRegsUsed[i])
spillVirtReg(MBB, MI, VirtReg, i);
else
removePhysReg(i);
+ }
#if 0
// This checking code is very expensive.
bool AllOk = true;
- for (unsigned i = MRegisterInfo::FirstVirtualRegister,
+ for (unsigned i = TargetRegisterInfo::FirstVirtualRegister,
e = MF->getRegInfo().getLastVirtReg(); i <= e; ++i)
if (unsigned PR = Virt2PhysRegMap[i]) {
cerr << "Register still mapped: " << i << " -> " << PR << "\n";
DOUT << "Machine Function " << "\n";
MF = &Fn;
TM = &Fn.getTarget();
- MRI = TM->getRegisterInfo();
+ TRI = TM->getRegisterInfo();
TII = TM->getInstrInfo();
- LV = &getAnalysis<LiveVariables>();
- PhysRegsUsed.assign(MRI->getNumRegs(), -1);
+ PhysRegsUsed.assign(TRI->getNumRegs(), -1);
// At various places we want to efficiently check to see whether a register
// is allocatable. To handle this, we mark all unallocatable registers as
// being pinned down, permanently.
{
- BitVector Allocable = MRI->getAllocatableSet(Fn);
+ BitVector Allocable = TRI->getAllocatableSet(Fn);
for (unsigned i = 0, e = Allocable.size(); i != e; ++i)
if (!Allocable[i])
PhysRegsUsed[i] = -2; // Mark the reg unallocable.
// initialize the virtual->physical register map to have a 'null'
// mapping for all virtual registers
- Virt2PhysRegMap.grow(MF->getRegInfo().getLastVirtReg());
+ unsigned LastVirtReg = MF->getRegInfo().getLastVirtReg();
+ Virt2PhysRegMap.grow(LastVirtReg);
+ Virt2LastUseMap.grow(LastVirtReg);
+ VirtRegModified.resize(LastVirtReg+1-TargetRegisterInfo::FirstVirtualRegister);
// Loop over all of the basic blocks, eliminating virtual register references
for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();
PhysRegsUsed.clear();
VirtRegModified.clear();
Virt2PhysRegMap.clear();
+ Virt2LastUseMap.clear();
return true;
}
projects / oota-llvm.git / blobdiff