First step to fix PR2088. Implement routine to compute the

[oota-llvm.git] / lib / CodeGen / RegAllocBigBlock.cpp

diff --git a/lib/CodeGen/RegAllocBigBlock.cpp b/lib/CodeGen/RegAllocBigBlock.cpp
index 592650fca0aaa2814f1edcb343f066ec91ea5dce..215f9430997ea6ef137307153f2dba495a3cdbee 100644 (file)
--- a/lib/CodeGen/RegAllocBigBlock.cpp
+++ b/lib/CodeGen/RegAllocBigBlock.cpp
@@ -44,7 +44,6 @@
 #include "llvm/ADT/IndexedMap.h"
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/SmallVector.h"
-#include "llvm/ADT/SmallPtrSet.h"
 #include "llvm/ADT/Statistic.h"
 #include <algorithm>
 using namespace llvm;
@@ -53,11 +52,11 @@ STATISTIC(NumStores, "Number of stores added");
 STATISTIC(NumLoads , "Number of loads added");
 STATISTIC(NumFolded, "Number of loads/stores folded into instructions");
 
-namespace {
-  static RegisterRegAlloc
-    bigBlockRegAlloc("bigblock", "  Big-block register allocator",
-                  createBigBlockRegisterAllocator);
+static RegisterRegAlloc
+  bigBlockRegAlloc("bigblock", "  Big-block register allocator",
+                createBigBlockRegisterAllocator);
 
+namespace {
 /// VRegKeyInfo - Defines magic values required to use VirtRegs as DenseMap
 /// keys.
   struct VRegKeyInfo {
@@ -95,7 +94,7 @@ namespace {
     
     /// RegInfo - For dealing with machine register info (aliases, folds
     /// etc)
-    const MRegisterInfo *RegInfo;
+    const TargetRegisterInfo *RegInfo;
 
     typedef SmallVector<unsigned, 2> VRegTimes;
 
@@ -152,8 +151,8 @@ namespace {
     /// markVirtRegModified - Lets us flip bits in the VirtRegModified bitset
     ///
     void markVirtRegModified(unsigned Reg, bool Val = true) {
-      assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
-      Reg -= MRegisterInfo::FirstVirtualRegister;
+      assert(TargetRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
+      Reg -= TargetRegisterInfo::FirstVirtualRegister;
       if (VirtRegModified.size() <= Reg)
         VirtRegModified.resize(Reg+1);
       VirtRegModified[Reg] = Val;
@@ -162,10 +161,10 @@ namespace {
     /// isVirtRegModified - Lets us query the VirtRegModified bitset
     ///
     bool isVirtRegModified(unsigned Reg) const {
-      assert(MRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
-      assert(Reg - MRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
+      assert(TargetRegisterInfo::isVirtualRegister(Reg) && "Illegal VirtReg!");
+      assert(Reg - TargetRegisterInfo::FirstVirtualRegister < VirtRegModified.size()
              && "Illegal virtual register!");
-      return VirtRegModified[Reg - MRegisterInfo::FirstVirtualRegister];
+      return VirtRegModified[Reg - TargetRegisterInfo::FirstVirtualRegister];
     }
 
   public:
@@ -386,7 +385,7 @@ bool RABigBlock::isPhysRegAvailable(unsigned PhysReg) const {
   // not free!
   for (const unsigned *AliasSet = RegInfo->getAliasSet(PhysReg);
        *AliasSet; ++AliasSet)
-    if (PhysRegsUsed[*AliasSet] != -1) // Aliased register in use?
+    if (PhysRegsUsed[*AliasSet] >= 0) // Aliased register in use?
       return false;                    // Can't use this reg then.
   return true;
 }
@@ -521,7 +520,7 @@ MachineInstr *RABigBlock::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI
     // try to fold the spill into the instruction
     SmallVector<unsigned, 2> Ops;
     Ops.push_back(OpNum);
-    if(MachineInstr* FMI = TII->foldMemoryOperand(MI, Ops, FrameIndex)) {
+    if(MachineInstr* FMI = TII->foldMemoryOperand(*MF, MI, Ops, FrameIndex)) {
       ++NumFolded;
       FMI->copyKillDeadInfo(MI);
       return MBB.insert(MBB.erase(MI), FMI);
@@ -562,7 +561,7 @@ void RABigBlock::FillVRegReadTable(MachineBasicBlock &MBB) {
       MachineOperand& MO = MI->getOperand(i);
       // look for vreg reads..
       if (MO.isRegister() && !MO.isDef() && MO.getReg() &&
-          MRegisterInfo::isVirtualRegister(MO.getReg())) {
+          TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
           // ..and add them to the read table.
           VRegTimes* &Times = VRegReadTable[MO.getReg()];
           if(!VRegReadTable[MO.getReg()]) {
@@ -675,7 +674,7 @@ void RABigBlock::AllocateBasicBlock(MachineBasicBlock &MBB) {
       MachineOperand& MO = MI->getOperand(i);
       // here we are looking for only used operands (never def&use)
       if (MO.isRegister() && !MO.isDef() && MO.getReg() && !MO.isImplicit() &&
-          MRegisterInfo::isVirtualRegister(MO.getReg()))
+          TargetRegisterInfo::isVirtualRegister(MO.getReg()))
         MI = reloadVirtReg(MBB, MI, i);
     }
 
@@ -686,7 +685,7 @@ void RABigBlock::AllocateBasicBlock(MachineBasicBlock &MBB) {
     for (unsigned i = 0, e = Kills.size(); i != e; ++i) {
       unsigned VirtReg = Kills[i];
       unsigned PhysReg = VirtReg;
-      if (MRegisterInfo::isVirtualRegister(VirtReg)) {
+      if (TargetRegisterInfo::isVirtualRegister(VirtReg)) {
         // If the virtual register was never materialized into a register, it
         // might not be in the map, but it won't hurt to zero it out anyway.
         unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
@@ -696,7 +695,7 @@ void RABigBlock::AllocateBasicBlock(MachineBasicBlock &MBB) {
         // Unallocatable register dead, ignore.
         continue;
       } else {
-        assert(!PhysRegsUsed[PhysReg] || PhysRegsUsed[PhysReg] == -1 &&
+        assert((!PhysRegsUsed[PhysReg] || PhysRegsUsed[PhysReg] == -1) &&
                "Silently clearing a virtual register?");
       }
 
@@ -721,7 +720,7 @@ void RABigBlock::AllocateBasicBlock(MachineBasicBlock &MBB) {
     for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
       MachineOperand& MO = MI->getOperand(i);
       if (MO.isRegister() && MO.isDef() && !MO.isImplicit() && MO.getReg() &&
-          MRegisterInfo::isPhysicalRegister(MO.getReg())) {
+          TargetRegisterInfo::isPhysicalRegister(MO.getReg())) {
         unsigned Reg = MO.getReg();
         if (PhysRegsUsed[Reg] == -2) continue;  // Something like ESP.
         // These are extra physical register defs when a sub-register
@@ -777,7 +776,7 @@ void RABigBlock::AllocateBasicBlock(MachineBasicBlock &MBB) {
     for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
       MachineOperand& MO = MI->getOperand(i);
       if (MO.isRegister() && MO.isDef() && MO.getReg() &&
-          MRegisterInfo::isVirtualRegister(MO.getReg())) {
+          TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
         unsigned DestVirtReg = MO.getReg();
         unsigned DestPhysReg;
 
@@ -796,7 +795,7 @@ void RABigBlock::AllocateBasicBlock(MachineBasicBlock &MBB) {
     for (unsigned i = 0, e = DeadDefs.size(); i != e; ++i) {
       unsigned VirtReg = DeadDefs[i];
       unsigned PhysReg = VirtReg;
-      if (MRegisterInfo::isVirtualRegister(VirtReg)) {
+      if (TargetRegisterInfo::isVirtualRegister(VirtReg)) {
         unsigned &PhysRegSlot = getVirt2PhysRegMapSlot(VirtReg);
         PhysReg = PhysRegSlot;
         assert(PhysReg != 0);
@@ -833,11 +832,12 @@ void RABigBlock::AllocateBasicBlock(MachineBasicBlock &MBB) {
 
   // Spill all physical registers holding virtual registers now.
   for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
-    if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2)
+    if (PhysRegsUsed[i] != -1 && PhysRegsUsed[i] != -2) {
       if (unsigned VirtReg = PhysRegsUsed[i])
         spillVirtReg(MBB, MI, VirtReg, i);
       else
         removePhysReg(i);
+    }
 }
 
 /// runOnMachineFunction - Register allocate the whole function
@@ -865,7 +865,7 @@ bool RABigBlock::runOnMachineFunction(MachineFunction &Fn) {
   Virt2PhysRegMap.grow(MF->getRegInfo().getLastVirtReg());
   StackSlotForVirtReg.grow(MF->getRegInfo().getLastVirtReg());
   VirtRegModified.resize(MF->getRegInfo().getLastVirtReg() - 
-                         MRegisterInfo::FirstVirtualRegister + 1, 0);
+                         TargetRegisterInfo::FirstVirtualRegister + 1, 0);
 
   // Loop over all of the basic blocks, eliminating virtual register references
   for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end();