=====
* RegisterClasses: Each RegClass accepts a
- MachineRegClass which contains machine specific info about that register
+ TargetRegClass which contains machine specific info about that register
class. The code in the RegClass is machine independent and they use
- access functions in the MachineRegClass object passed into it to get
+ access functions in the TargetRegClass object passed into it to get
machine specific info.
* Machine dependent work: All parts of the register coloring algorithm
except coloring of an individual node are machine independent.
-
- Register allocation must be done as:
-
- MethodLiveVarInfo LVI(*MethodI ); // compute LV info
- LVI.analyze();
-
- TargetMachine &target = ....
-
-
- PhyRegAlloc PRA(*MethodI, target, &LVI); // allocate regs
- PRA.allocateRegisters();
*/
#ifndef PHY_REG_ALLOC_H
#define PHY_REG_ALLOC_H
-#include "llvm/CodeGen/RegClass.h"
#include "llvm/CodeGen/LiveRangeInfo.h"
-#include <deque>
-class MachineCodeForMethod;
-class MachineRegInfo;
-class MethodLiveVarInfo;
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include <map>
+
+class MachineFunction;
+class TargetRegInfo;
+class FunctionLiveVarInfo;
class MachineInstr;
-namespace cfg { class LoopInfo; }
+class LoopInfo;
+class RegClass;
//----------------------------------------------------------------------------
// Class AddedInstrns:
// to store such instructions added before and after an existing instruction.
//----------------------------------------------------------------------------
-class AddedInstrns
-{
- public:
- std::deque<MachineInstr*> InstrnsBefore;// Added insts BEFORE an existing inst
- std::deque<MachineInstr*> InstrnsAfter; // Added insts AFTER an existing inst
+struct AddedInstrns {
+ std::vector<MachineInstr*> InstrnsBefore;//Insts added BEFORE an existing inst
+ std::vector<MachineInstr*> InstrnsAfter; //Insts added AFTER an existing inst
};
-typedef std::hash_map<const MachineInstr *, AddedInstrns *> AddedInstrMapType;
-
-
-
//----------------------------------------------------------------------------
// class PhyRegAlloc:
// Main class the register allocator. Call allocateRegisters() to allocate
-// registers for a Method.
+// registers for a Function.
//----------------------------------------------------------------------------
-
-class PhyRegAlloc: public NonCopyable {
-
+class PhyRegAlloc {
std::vector<RegClass *> RegClassList; // vector of register classes
const TargetMachine &TM; // target machine
- const Method* Meth; // name of the method we work on
- MachineCodeForMethod &mcInfo; // descriptor for method's native code
- MethodLiveVarInfo *const LVI; // LV information for this method
+ const Function *Fn; // name of the function we work on
+ MachineFunction &MF; // descriptor for method's native code
+ FunctionLiveVarInfo *const LVI; // LV information for this method
// (already computed for BBs)
LiveRangeInfo LRI; // LR info (will be computed)
- const MachineRegInfo &MRI; // Machine Register information
+ const TargetRegInfo &MRI; // Machine Register information
const unsigned NumOfRegClasses; // recorded here for efficiency
+ // Map to indicate whether operands of each MachineInstr have been updated
+ // according to their assigned colors. This is primarily for debugging and
+ // could be removed in the long run.
+ std::map<const MachineInstr *, bool> OperandsColoredMap;
- AddedInstrMapType AddedInstrMap; // to store instrns added in this phase
- cfg::LoopInfo *LoopDepthCalc; // to calculate loop depths
- ReservedColorListType ResColList; // A set of reserved regs if desired.
- // currently not used
+ // AddedInstrMap - Used to store instrns added in this phase
+ std::map<const MachineInstr *, AddedInstrns> AddedInstrMap;
+ // ScratchRegsUsed - Contains scratch register uses for a particular MI.
+ typedef std::multimap<const MachineInstr*, int> ScratchRegsUsedTy;
+ ScratchRegsUsedTy ScratchRegsUsed;
+
+ AddedInstrns AddedInstrAtEntry; // to store instrns added at entry
+ LoopInfo *LoopDepthCalc; // to calculate loop depths
+
+ PhyRegAlloc(const PhyRegAlloc&); // DO NOT IMPLEMENT
+ void operator=(const PhyRegAlloc&); // DO NOT IMPLEMENT
public:
- PhyRegAlloc(Method *M, const TargetMachine& TM, MethodLiveVarInfo *Lvi,
- cfg::LoopInfo *LoopDepthCalc);
+ PhyRegAlloc(Function *F, const TargetMachine& TM, FunctionLiveVarInfo *Lvi,
+ LoopInfo *LoopDepthCalc);
~PhyRegAlloc();
// main method called for allocating registers
//
void allocateRegisters();
-
// access to register classes by class ID
//
- const RegClass* getRegClassByID(unsigned int id) const {
- return RegClassList[id];
+ const RegClass* getRegClassByID(unsigned id) const {
+ return RegClassList[id];
+ }
+ RegClass* getRegClassByID(unsigned id) {
+ return RegClassList[id];
}
- RegClass* getRegClassByID(unsigned int id) {
- return RegClassList[id]; }
-
-
-private:
-
-
-
- //------- ------------------ private methods---------------------------------
+private:
void addInterference(const Value *Def, const ValueSet *LVSet,
bool isCallInst);
void createIGNodeListsAndIGs();
void buildInterferenceGraphs();
- void setCallInterferences(const MachineInstr *MInst,
- const ValueSet *LVSetAft );
+ void setCallInterferences(const MachineInstr *MI,
+ const ValueSet *LVSetAft);
void move2DelayedInstr(const MachineInstr *OrigMI,
- const MachineInstr *DelayedMI );
+ const MachineInstr *DelayedMI);
void markUnusableSugColors();
void allocateStackSpace4SpilledLRs();
- void insertCode4SpilledLR (const LiveRange *LR,
- MachineInstr *MInst,
- const BasicBlock *BB,
- const unsigned OpNum);
+ void insertCode4SpilledLR(const LiveRange *LR,
+ MachineBasicBlock::iterator& MII,
+ MachineBasicBlock &MBB, unsigned OpNum);
+
+ // Method for inserting caller saving code. The caller must save all the
+ // volatile registers live across a call.
+ void insertCallerSavingCode(std::vector<MachineInstr*>& instrnsBefore,
+ std::vector<MachineInstr*>& instrnsAfter,
+ MachineInstr *CallMI,
+ const BasicBlock *BB);
inline void constructLiveRanges() { LRI.constructLiveRanges(); }
void colorIncomingArgs();
void colorCallRetArgs();
void updateMachineCode();
+ void updateInstruction(MachineBasicBlock::iterator& MII,
+ MachineBasicBlock &MBB);
- void printLabel(const Value *const Val);
+ void printLabel(const Value *Val);
void printMachineCode();
- friend class UltraSparcRegInfo;
-
-
- int getUsableUniRegAtMI(RegClass *RC, int RegType,
- const MachineInstr *MInst,
- const ValueSet *LVSetBef, MachineInstr *&MIBef,
- MachineInstr *&MIAft );
- int getUnusedUniRegAtMI(RegClass *RC, const MachineInstr *MInst,
- const ValueSet *LVSetBef);
+ int getUsableUniRegAtMI(int RegType, const ValueSet *LVSetBef,
+ MachineInstr *MI,
+ std::vector<MachineInstr*>& MIBef,
+ std::vector<MachineInstr*>& MIAft);
+
+ // Callback method used to find unused registers.
+ // LVSetBef is the live variable set to search for an unused register.
+ // If it is not specified, the LV set before the current MI is used.
+ // This is sufficient as long as no new copy instructions are generated
+ // to copy the free register to memory.
+ //
+ int getUnusedUniRegAtMI(RegClass *RC, int RegType,
+ const MachineInstr *MI,
+ const ValueSet *LVSetBef = 0);
+
+ void setRelRegsUsedByThisInst(RegClass *RC, int RegType,
+ const MachineInstr *MI);
- void setRelRegsUsedByThisInst(RegClass *RC, const MachineInstr *MInst );
- int getUniRegNotUsedByThisInst(RegClass *RC, const MachineInstr *MInst);
+ int getUniRegNotUsedByThisInst(RegClass *RC, int RegType,
+ const MachineInstr *MI);
- void addInterf4PseudoInstr(const MachineInstr *MInst);
+ void addInterf4PseudoInstr(const MachineInstr *MI);
};
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