// Temporarily disable experimental passes.
const TargetSubtargetInfo &ST = TM->getSubtarget<TargetSubtargetInfo>();
- if (!ST.enableMachineScheduler())
+ if (!ST.useMachineScheduler())
disablePass(&MachineSchedulerID);
}
if (Started && !Stopped)
PM->add(P);
+ else
+ delete P;
if (StopAfter == PassID)
Stopped = true;
if (StartAfter == PassID)
addPass(P); // Ends the lifetime of P.
// Add the passes after the pass P if there is any.
- for (SmallVector<std::pair<AnalysisID, IdentifyingPassPtr>, 4>::iterator
+ for (SmallVectorImpl<std::pair<AnalysisID, IdentifyingPassPtr> >::iterator
I = Impl->InsertedPasses.begin(), E = Impl->InsertedPasses.end();
I != E; ++I) {
if ((*I).first == PassID) {
addPass(createDwarfEHPass(TM));
break;
case ExceptionHandling::None:
- addPass(createLowerInvokePass(TM->getTargetLowering()));
+ addPass(createLowerInvokePass(TM));
// The lower invoke pass may create unreachable code. Remove it.
addPass(createUnreachableBlockEliminationPass());
/// before exception handling preparation passes.
void TargetPassConfig::addCodeGenPrepare() {
if (getOptLevel() != CodeGenOpt::None && !DisableCGP)
- addPass(createCodeGenPreparePass(getTargetLowering()));
+ addPass(createCodeGenPreparePass(TM));
}
/// Add common passes that perform LLVM IR to IR transforms in preparation for