Increment counter that keeps track of total number of sret promoted.

[oota-llvm.git] / lib / CodeGen / PHIElimination.cpp

diff --git a/lib/CodeGen/PHIElimination.cpp b/lib/CodeGen/PHIElimination.cpp
index 1773b577ecb093b7a3a80d5a8ebc8f974acd8eaa..845b1c11d645d7e85211da70c61beab9ec5e0fbf 100644 (file)
--- a/lib/CodeGen/PHIElimination.cpp
+++ b/lib/CodeGen/PHIElimination.cpp
@@ -18,7 +18,7 @@
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/CodeGen/SSARegMap.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/Target/TargetInstrInfo.h"
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/ADT/STLExtras.h"
@@ -51,6 +51,8 @@ namespace {
 
     virtual void getAnalysisUsage(AnalysisUsage &AU) const {
       AU.addPreserved<LiveVariables>();
+      AU.addPreservedID(MachineLoopInfoID);
+      AU.addPreservedID(MachineDominatorsID);
       MachineFunctionPass::getAnalysisUsage(AU);
     }
 
@@ -127,15 +129,15 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
 
   // Create a new register for the incoming PHI arguments.
   MachineFunction &MF = *MBB.getParent();
-  const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(DestReg);
-  unsigned IncomingReg = MF.getSSARegMap()->createVirtualRegister(RC);
+  const TargetRegisterClass *RC = MF.getRegInfo().getRegClass(DestReg);
+  unsigned IncomingReg = MF.getRegInfo().createVirtualRegister(RC);
 
   // Insert a register to register copy in the top of the current block (but
   // after any remaining phi nodes) which copies the new incoming register
   // into the phi node destination.
   //
-  const MRegisterInfo *RegInfo = MF.getTarget().getRegisterInfo();
-  RegInfo->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC);
+  const TargetInstrInfo *TII = MF.getTarget().getInstrInfo();
+  TII->copyRegToReg(MBB, AfterPHIsIt, DestReg, IncomingReg, RC, RC);
 
   // Update live variable information if there is any...
   LiveVariables *LV = getAnalysisToUpdate<LiveVariables>();
@@ -163,10 +165,6 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
       LV->addVirtualRegisterDead(DestReg, PHICopy);
       LV->removeVirtualRegistersDead(MPhi);
     }
-    
-    // Realize that the destination register is defined by the PHI copy now, not
-    // the PHI itself.
-    LV->getVarInfo(DestReg).DefInst = PHICopy;
 
     LV->getVarInfo(IncomingReg).UsedBlocks[MBB.getNumber()] = true;
   }
@@ -174,9 +172,8 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
   // Adjust the VRegPHIUseCount map to account for the removal of this PHI
   // node.
   for (unsigned i = 1; i != MPhi->getNumOperands(); i += 2)
-    --VRegPHIUseCount[BBVRegPair(
-                        MPhi->getOperand(i + 1).getMachineBasicBlock(),
-                        MPhi->getOperand(i).getReg())];
+    --VRegPHIUseCount[BBVRegPair(MPhi->getOperand(i + 1).getMBB(),
+                                 MPhi->getOperand(i).getReg())];
 
   // Now loop over all of the incoming arguments, changing them to copy into
   // the IncomingReg register in the corresponding predecessor basic block.
@@ -184,12 +181,12 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
   std::set<MachineBasicBlock*> MBBsInsertedInto;
   for (int i = MPhi->getNumOperands() - 1; i >= 2; i-=2) {
     unsigned SrcReg = MPhi->getOperand(i-1).getReg();
-    assert(MRegisterInfo::isVirtualRegister(SrcReg) &&
+    assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
            "Machine PHI Operands must all be virtual registers!");
 
     // Get the MachineBasicBlock equivalent of the BasicBlock that is the
     // source path the PHI.
-    MachineBasicBlock &opBlock = *MPhi->getOperand(i).getMachineBasicBlock();
+    MachineBasicBlock &opBlock = *MPhi->getOperand(i).getMBB();
 
     // Check to make sure we haven't already emitted the copy for this block.
     // This can happen because PHI nodes may have multiple entries for the
@@ -202,7 +199,7 @@ void PNE::LowerAtomicPHINode(MachineBasicBlock &MBB,
     MachineBasicBlock::iterator I = opBlock.getFirstTerminator();
     
     // Insert the copy.
-    RegInfo->copyRegToReg(opBlock, I, IncomingReg, SrcReg, RC, RC);
+    TII->copyRegToReg(opBlock, I, IncomingReg, SrcReg, RC, RC);
 
     // Now update live variable information if we have it.  Otherwise we're done
     if (!LV) continue;
@@ -339,7 +336,6 @@ void PNE::analyzePHINodes(const MachineFunction& Fn) {
     for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
          BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
       for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
-        ++VRegPHIUseCount[BBVRegPair(
-                            BBI->getOperand(i + 1).getMachineBasicBlock(),
-                            BBI->getOperand(i).getReg())];
+        ++VRegPHIUseCount[BBVRegPair(BBI->getOperand(i + 1).getMBB(),
+                                     BBI->getOperand(i).getReg())];
 }