Add a comment which should hopefully make the purpose of this method a

[oota-llvm.git] / lib / CodeGen / MachineVerifier.cpp

diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp
index 70ccae6423bca3259758ff41208e1f1d533d9c8a..be1396c7a8101bcd48c2c2c5bc563d247c345a56 100644 (file)
--- a/lib/CodeGen/MachineVerifier.cpp
+++ b/lib/CodeGen/MachineVerifier.cpp
@@ -173,7 +173,7 @@ namespace {
 
 char MachineVerifier::ID = 0;
 static RegisterPass<MachineVerifier>
-MachineVer("verify-machineinstrs", "Verify generated machine code");
+MachineVer("machineverifier", "Verify generated machine code");
 static const PassInfo *const MachineVerifyID = &MachineVer;
 
 FunctionPass *
@@ -327,6 +327,18 @@ void
 MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum)
 {
   const MachineInstr *MI = MO->getParent();
+  const TargetInstrDesc &TI = MI->getDesc();
+
+  // The first TI.NumDefs operands must be explicit register defines
+  if (MONum < TI.getNumDefs()) {
+    if (!MO->isReg())
+      report("Explicit definition must be a register", MO, MONum);
+    else if (!MO->isDef())
+      report("Explicit definition marked as use", MO, MONum);
+    else if (MO->isImplicit())
+      report("Explicit definition marked as implicit", MO, MONum);
+  }
+
   switch (MO->getType()) {
   case MachineOperand::MO_Register: {
     const unsigned Reg = MO->getReg();
@@ -374,7 +386,6 @@ MachineVerifier::visitMachineOperand(const MachineOperand *MO, unsigned MONum)
     }
 
     // Check register classes.
-    const TargetInstrDesc &TI = MI->getDesc();
     if (MONum < TI.getNumOperands() && !MO->isImplicit()) {
       const TargetOperandInfo &TOI = TI.OpInfo[MONum];
       unsigned SubIdx = MO->getSubReg();
@@ -446,7 +457,8 @@ MachineVerifier::visitMachineInstrAfter(const MachineInstr *MI)
       if (TargetRegisterInfo::isPhysicalRegister(*I)) {
         // We allow double defines to physical registers with live
         // super-registers.
-        if (!allowPhysDoubleDefs && !anySuperRegisters(regsLive, *I)) {
+        if (!allowPhysDoubleDefs && !isReserved(*I) &&
+            !anySuperRegisters(regsLive, *I)) {
           report("Redefining a live physical register", MI);
           *OS << "Register " << TRI->getName(*I)
               << " was defined but already live.\n";
@@ -615,7 +627,7 @@ MachineVerifier::visitMachineFunctionAfter()
         for (MachineBasicBlock::const_livein_iterator I = MFI->livein_begin(),
                E = MFI->livein_end(); I != E; ++I) {
           if (TargetRegisterInfo::isPhysicalRegister(*I) &&
-              !PrInfo.isLiveOut(*I)) {
+              !isReserved (*I) && !PrInfo.isLiveOut(*I)) {
             report("Live-in physical register is not live-out from predecessor",
                    MFI);
             *OS << "Register " << TRI->getName(*I)