SelectionDAG: add a -filter-view-dags option to llc

[oota-llvm.git] / lib / CodeGen / MachineVerifier.cpp

diff --git a/lib/CodeGen/MachineVerifier.cpp b/lib/CodeGen/MachineVerifier.cpp
index 5cdcc666028eb896ea03c06d652d0eaa1311aa24..364e8e2cb3edaf12f0a387caffd8e2e90fd3bcee 100644 (file)
--- a/lib/CodeGen/MachineVerifier.cpp
+++ b/lib/CodeGen/MachineVerifier.cpp
@@ -243,10 +243,10 @@ namespace {
 
   struct MachineVerifierPass : public MachineFunctionPass {
     static char ID; // Pass ID, replacement for typeid
-    const char *const Banner;
+    const std::string Banner;
 
-    MachineVerifierPass(const char *b = nullptr)
-      : MachineFunctionPass(ID), Banner(b) {
+    MachineVerifierPass(const std::string &banner = nullptr)
+      : MachineFunctionPass(ID), Banner(banner) {
         initializeMachineVerifierPassPass(*PassRegistry::getPassRegistry());
       }
 
@@ -256,7 +256,7 @@ namespace {
     }
 
     bool runOnMachineFunction(MachineFunction &MF) override {
-      MF.verify(this, Banner);
+      MF.verify(this, Banner.c_str());
       return false;
     }
   };
@@ -267,7 +267,7 @@ char MachineVerifierPass::ID = 0;
 INITIALIZE_PASS(MachineVerifierPass, "machineverifier",
                 "Verify generated machine code", false, false)
 
-FunctionPass *llvm::createMachineVerifierPass(const char *Banner) {
+FunctionPass *llvm::createMachineVerifierPass(const std::string &Banner) {
   return new MachineVerifierPass(Banner);
 }
 
@@ -1066,7 +1066,18 @@ void MachineVerifier::checkLiveness(const MachineOperand *MO, unsigned MONum) {
     if (!regsLive.count(Reg)) {
       if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
         // Reserved registers may be used even when 'dead'.
-        if (!isReserved(Reg))
+        bool Bad = !isReserved(Reg);
+        // We are fine if just any subregister has a defined value.
+        if (Bad) {
+          for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid();
+               ++SubRegs) {
+            if (regsLive.count(*SubRegs)) {
+              Bad = false;
+              break;
+            }
+          }
+        }
+        if (Bad)
           report("Using an undefined physical register", MO, MONum);
       } else if (MRI->def_empty(Reg)) {
         report("Reading virtual register without a def", MO, MONum);
@@ -1632,9 +1643,8 @@ void MachineVerifier::verifyLiveRangeSegment(const LiveRange &LR,
 
 void MachineVerifier::verifyLiveRange(const LiveRange &LR, unsigned Reg,
                                       unsigned LaneMask) {
-  for (LiveRange::const_vni_iterator I = LR.vni_begin(), E = LR.vni_end();
-       I != E; ++I)
-    verifyLiveRangeValue(LR, *I, Reg, LaneMask);
+  for (const VNInfo *VNI : LR.valnos)
+    verifyLiveRangeValue(LR, VNI, Reg, LaneMask);
 
   for (LiveRange::const_iterator I = LR.begin(), E = LR.end(); I != E; ++I)
     verifyLiveRangeSegment(LR, I, Reg, LaneMask);
@@ -1647,15 +1657,14 @@ void MachineVerifier::verifyLiveInterval(const LiveInterval &LI) {
   if (TargetRegisterInfo::isVirtualRegister(Reg)) {
     unsigned Mask = 0;
     unsigned MaxMask = MRI->getMaxLaneMaskForVReg(Reg);
-    for (LiveInterval::const_subrange_iterator I = LI.subrange_begin(),
-         E = LI.subrange_end(); I != E; ++I) {
-      if ((Mask & I->LaneMask) != 0)
+    for (const LiveInterval::SubRange &SR : LI.subranges()) {
+      if ((Mask & SR.LaneMask) != 0)
         report("Lane masks of sub ranges overlap in live interval", MF, LI);
-      if ((I->LaneMask & ~MaxMask) != 0)
+      if ((SR.LaneMask & ~MaxMask) != 0)
         report("Subrange lanemask is invalid", MF, LI);
-      Mask |= I->LaneMask;
-      verifyLiveRange(*I, LI.reg, I->LaneMask);
-      if (!LI.covers(*I))
+      Mask |= SR.LaneMask;
+      verifyLiveRange(SR, LI.reg, SR.LaneMask);
+      if (!LI.covers(SR))
         report("A Subrange is not covered by the main range", MF, LI);
     }
   } else if (LI.hasSubRanges()) {