class UnpackMachineBundles : public MachineFunctionPass {
public:
static char ID; // Pass identification
- UnpackMachineBundles() : MachineFunctionPass(ID) {
+ UnpackMachineBundles(std::function<bool(const Function &)> Ftor = nullptr)
+ : MachineFunctionPass(ID), PredicateFtor(Ftor) {
initializeUnpackMachineBundlesPass(*PassRegistry::getPassRegistry());
}
bool runOnMachineFunction(MachineFunction &MF) override;
+
+ private:
+ std::function<bool(const Function &)> PredicateFtor;
};
} // end anonymous namespace
"Unpack machine instruction bundles", false, false)
bool UnpackMachineBundles::runOnMachineFunction(MachineFunction &MF) {
+ if (PredicateFtor && !PredicateFtor(*MF.getFunction()))
+ return false;
+
bool Changed = false;
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
MachineBasicBlock *MBB = &*I;
return Changed;
}
+FunctionPass *
+llvm::createUnpackMachineBundles(std::function<bool(const Function &)> Ftor) {
+ return new UnpackMachineBundles(Ftor);
+}
namespace {
class FinalizeMachineBundles : public MachineFunctionPass {
MachineOperandIteratorBase::analyzePhysReg(unsigned Reg,
const TargetRegisterInfo *TRI) {
bool AllDefsDead = true;
- PhysRegInfo PRI = {false, false, false, false, false, false};
+ PhysRegInfo PRI = {false, false, false, false, false, false, false};
assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
"analyzePhysReg not given a physical register!");
for (; isValid(); ++*this) {
MachineOperand &MO = deref();
- if (MO.isRegMask() && MO.clobbersPhysReg(Reg))
- PRI.Clobbers = true; // Regmask clobbers Reg.
+ if (MO.isRegMask() && MO.clobbersPhysReg(Reg)) {
+ PRI.Clobbered = true;
+ continue;
+ }
if (!MO.isReg())
continue;
if (!MOReg || !TargetRegisterInfo::isPhysicalRegister(MOReg))
continue;
- bool IsRegOrSuperReg = MOReg == Reg || TRI->isSubRegister(MOReg, Reg);
- bool IsRegOrOverlapping = MOReg == Reg || TRI->regsOverlap(MOReg, Reg);
-
- if (IsRegOrSuperReg && MO.readsReg()) {
- // Reg or a super-reg is read, and perhaps killed also.
- PRI.Reads = true;
- PRI.Kills = MO.isKill();
- }
-
- if (IsRegOrOverlapping && MO.readsReg()) {
- PRI.ReadsOverlap = true;// Reg or an overlapping register is read.
- }
-
- if (!MO.isDef())
+ if (!TRI->regsOverlap(MOReg, Reg))
continue;
- if (IsRegOrSuperReg) {
- PRI.Defines = true; // Reg or a super-register is defined.
+ bool Covered = TRI->isSuperRegisterEq(MOReg, Reg);
+ if (MO.readsReg()) {
+ PRI.Read = true;
+ if (Covered) {
+ PRI.FullyRead = true;
+ if (MO.isKill())
+ PRI.Killed = true;
+ }
+ } else if (MO.isDef()) {
+ PRI.Defined = true;
+ if (Covered)
+ PRI.FullyDefined = true;
if (!MO.isDead())
AllDefsDead = false;
}
- if (IsRegOrOverlapping)
- PRI.Clobbers = true; // Reg or an overlapping reg is defined.
}
- if (AllDefsDead && PRI.Defines)
- PRI.DefinesDead = true; // Reg or super-register was defined and was dead.
+ if (AllDefsDead && PRI.FullyDefined)
+ PRI.DeadDef = true;
return PRI;
}