-// $Id$
-//***************************************************************************
-// File:
-// MachineInstr.cpp
-//
-// Purpose:
-//
-//
-// Strategy:
-//
-// History:
-// 7/2/01 - Vikram Adve - Created
-//**************************************************************************/
+//===-- MachineInstr.cpp --------------------------------------------------===//
+//
+// The LLVM Compiler Infrastructure
+//
+// This file was developed by the LLVM research group and is distributed under
+// the University of Illinois Open Source License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// Methods common to all machine instructions.
+//
+//===----------------------------------------------------------------------===//
#include "llvm/CodeGen/MachineInstr.h"
-#include "llvm/Value.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/TargetInstrInfo.h"
+#include "llvm/Target/MRegisterInfo.h"
+#include "llvm/Support/LeakDetector.h"
#include <iostream>
-using std::cerr;
-
-
-//************************ Class Implementations **************************/
-
-// Constructor for instructions with fixed #operands (nearly all)
-MachineInstr::MachineInstr(MachineOpCode _opCode,
- OpCodeMask _opCodeMask)
- : opCode(_opCode),
- opCodeMask(_opCodeMask),
- operands(TargetInstrDescriptors[_opCode].numOperands)
-{
- assert(TargetInstrDescriptors[_opCode].numOperands >= 0);
-}
-
-// Constructor for instructions with variable #operands
-MachineInstr::MachineInstr(MachineOpCode _opCode,
- unsigned numOperands,
- OpCodeMask _opCodeMask)
- : opCode(_opCode),
- opCodeMask(_opCodeMask),
- operands(numOperands)
-{
-}
-
-void
-MachineInstr::SetMachineOperandVal(unsigned int i,
- MachineOperand::MachineOperandType opType,
- Value* _val,
- bool isdef,
- bool isDefAndUse)
-{
- assert(i < operands.size());
- operands[i].Initialize(opType, _val);
- if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
- operands[i].markDef();
- if (isDefAndUse)
- operands[i].markDefAndUse();
-}
-
-void
-MachineInstr::SetMachineOperandConst(unsigned int i,
- MachineOperand::MachineOperandType operandType,
- int64_t intValue)
-{
- assert(i < operands.size());
- assert(TargetInstrDescriptors[opCode].resultPos != (int) i &&
- "immed. constant cannot be defined");
- operands[i].InitializeConst(operandType, intValue);
-}
-
-void
-MachineInstr::SetMachineOperandReg(unsigned int i,
- int regNum,
- bool isdef,
- bool isDefAndUse,
- bool isCCReg)
-{
- assert(i < operands.size());
- operands[i].InitializeReg(regNum, isCCReg);
- if (isdef || TargetInstrDescriptors[opCode].resultPos == (int) i)
- operands[i].markDef();
- if (isDefAndUse)
- operands[i].markDefAndUse();
- regsUsed.insert(regNum);
-}
-
-void
-MachineInstr::SetRegForOperand(unsigned i, int regNum)
-{
- operands[i].setRegForValue(regNum);
- regsUsed.insert(regNum);
-}
-
-
-void
-MachineInstr::dump() const
-{
- cerr << " " << *this;
-}
-
-static inline std::ostream &OutputValue(std::ostream &os,
- const Value* val)
-{
- os << "(val ";
- if (val && val->hasName())
- return os << val->getName() << ")";
- else
- return os << (void*) val << ")"; // print address only
-}
-
-std::ostream &operator<<(std::ostream& os, const MachineInstr& minstr)
-{
- os << TargetInstrDescriptors[minstr.opCode].opCodeString;
+
+using namespace llvm;
+
+// Global variable holding an array of descriptors for machine instructions.
+// The actual object needs to be created separately for each target machine.
+// This variable is initialized and reset by class TargetInstrInfo.
+//
+// FIXME: This should be a property of the target so that more than one target
+// at a time can be active...
+//
+namespace llvm {
+ extern const TargetInstrDescriptor *TargetInstrDescriptors;
+}
+
+/// MachineInstr ctor - This constructor creates a dummy MachineInstr with
+/// opcode 0 and no operands.
+MachineInstr::MachineInstr()
+ : Opcode(0), NumImplicitOps(0), parent(0) {
+ // Make sure that we get added to a machine basicblock
+ LeakDetector::addGarbageObject(this);
+}
+
+void MachineInstr::addImplicitDefUseOperands(const TargetInstrDescriptor &TID) {
+ if (TID.ImplicitDefs)
+ for (const unsigned *ImpDefs = TID.ImplicitDefs; *ImpDefs; ++ImpDefs) {
+ MachineOperand Op;
+ Op.opType = MachineOperand::MO_Register;
+ Op.IsDef = true;
+ Op.IsImp = true;
+ Op.IsKill = false;
+ Op.IsDead = false;
+ Op.contents.RegNo = *ImpDefs;
+ Op.offset = 0;
+ Operands.push_back(Op);
+ }
+ if (TID.ImplicitUses)
+ for (const unsigned *ImpUses = TID.ImplicitUses; *ImpUses; ++ImpUses) {
+ MachineOperand Op;
+ Op.opType = MachineOperand::MO_Register;
+ Op.IsDef = false;
+ Op.IsImp = true;
+ Op.IsKill = false;
+ Op.IsDead = false;
+ Op.contents.RegNo = *ImpUses;
+ Op.offset = 0;
+ Operands.push_back(Op);
+ }
+}
+
+/// MachineInstr ctor - This constructor create a MachineInstr and add the
+/// implicit operands. It reserves space for number of operands specified by
+/// TargetInstrDescriptor or the numOperands if it is not zero. (for
+/// instructions with variable number of operands).
+MachineInstr::MachineInstr(const TargetInstrDescriptor &TID)
+ : Opcode(TID.Opcode), NumImplicitOps(0), parent(0) {
+ if (TID.ImplicitDefs)
+ for (const unsigned *ImpDefs = TID.ImplicitDefs; *ImpDefs; ++ImpDefs)
+ NumImplicitOps++;
+ if (TID.ImplicitUses)
+ for (const unsigned *ImpUses = TID.ImplicitUses; *ImpUses; ++ImpUses)
+ NumImplicitOps++;
+ Operands.reserve(NumImplicitOps + TID.numOperands);
+ addImplicitDefUseOperands(TID);
+ // Make sure that we get added to a machine basicblock
+ LeakDetector::addGarbageObject(this);
+}
+
+/// MachineInstr ctor - Work exactly the same as the ctor above, except that the
+/// MachineInstr is created and added to the end of the specified basic block.
+///
+MachineInstr::MachineInstr(MachineBasicBlock *MBB,
+ const TargetInstrDescriptor &TID)
+ : Opcode(TID.Opcode), NumImplicitOps(0), parent(0) {
+ assert(MBB && "Cannot use inserting ctor with null basic block!");
+ if (TID.ImplicitDefs)
+ for (const unsigned *ImpDefs = TID.ImplicitDefs; *ImpDefs; ++ImpDefs)
+ NumImplicitOps++;
+ if (TID.ImplicitUses)
+ for (const unsigned *ImpUses = TID.ImplicitUses; *ImpUses; ++ImpUses)
+ NumImplicitOps++;
+ Operands.reserve(NumImplicitOps + TID.numOperands);
+ addImplicitDefUseOperands(TID);
+ // Make sure that we get added to a machine basicblock
+ LeakDetector::addGarbageObject(this);
+ MBB->push_back(this); // Add instruction to end of basic block!
+}
+
+/// MachineInstr ctor - Copies MachineInstr arg exactly
+///
+MachineInstr::MachineInstr(const MachineInstr &MI) {
+ Opcode = MI.getOpcode();
+ NumImplicitOps = MI.NumImplicitOps;
+ Operands.reserve(MI.getNumOperands());
+
+ // Add operands
+ for (unsigned i = 0; i != MI.getNumOperands(); ++i)
+ Operands.push_back(MI.getOperand(i));
+
+ // Set parent, next, and prev to null
+ parent = 0;
+ prev = 0;
+ next = 0;
+}
+
+
+MachineInstr::~MachineInstr() {
+ LeakDetector::removeGarbageObject(this);
+}
+
+/// removeFromParent - This method unlinks 'this' from the containing basic
+/// block, and returns it, but does not delete it.
+MachineInstr *MachineInstr::removeFromParent() {
+ assert(getParent() && "Not embedded in a basic block!");
+ getParent()->remove(this);
+ return this;
+}
+
+
+/// OperandComplete - Return true if it's illegal to add a new operand
+///
+bool MachineInstr::OperandsComplete() const {
+ unsigned short NumOperands = TargetInstrDescriptors[Opcode].numOperands;
+ if ((TargetInstrDescriptors[Opcode].Flags & M_VARIABLE_OPS) == 0 &&
+ getNumOperands()-NumImplicitOps >= NumOperands)
+ return true; // Broken: we have all the operands of this instruction!
+ return false;
+}
+
+/// isIdenticalTo - Return true if this operand is identical to the specified
+/// operand.
+bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
+ if (getType() != Other.getType()) return false;
- for (unsigned i=0, N=minstr.getNumOperands(); i < N; i++) {
- os << "\t" << minstr.getOperand(i);
- if( minstr.operandIsDefined(i) )
- os << "*";
- if( minstr.operandIsDefinedAndUsed(i) )
- os << "*";
+ switch (getType()) {
+ default: assert(0 && "Unrecognized operand type");
+ case MachineOperand::MO_Register:
+ return getReg() == Other.getReg() && isDef() == Other.isDef();
+ case MachineOperand::MO_Immediate:
+ return getImm() == Other.getImm();
+ case MachineOperand::MO_MachineBasicBlock:
+ return getMBB() == Other.getMBB();
+ case MachineOperand::MO_FrameIndex:
+ return getFrameIndex() == Other.getFrameIndex();
+ case MachineOperand::MO_ConstantPoolIndex:
+ return getConstantPoolIndex() == Other.getConstantPoolIndex() &&
+ getOffset() == Other.getOffset();
+ case MachineOperand::MO_JumpTableIndex:
+ return getJumpTableIndex() == Other.getJumpTableIndex();
+ case MachineOperand::MO_GlobalAddress:
+ return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
+ case MachineOperand::MO_ExternalSymbol:
+ return !strcmp(getSymbolName(), Other.getSymbolName()) &&
+ getOffset() == Other.getOffset();
}
-
- // code for printing implict references
- unsigned NumOfImpRefs = minstr.getNumImplicitRefs();
- if( NumOfImpRefs > 0 ) {
- os << "\tImplicit: ";
- for(unsigned z=0; z < NumOfImpRefs; z++) {
- OutputValue(os, minstr.getImplicitRef(z));
- if( minstr.implicitRefIsDefined(z)) os << "*";
- if( minstr.implicitRefIsDefinedAndUsed(z)) os << "*";
- os << "\t";
- }
+}
+
+void MachineInstr::dump() const {
+ std::cerr << " " << *this;
+}
+
+static inline void OutputReg(std::ostream &os, unsigned RegNo,
+ const MRegisterInfo *MRI = 0) {
+ if (!RegNo || MRegisterInfo::isPhysicalRegister(RegNo)) {
+ if (MRI)
+ os << "%" << MRI->get(RegNo).Name;
+ else
+ os << "%mreg(" << RegNo << ")";
+ } else
+ os << "%reg" << RegNo;
+}
+
+static void print(const MachineOperand &MO, std::ostream &OS,
+ const TargetMachine *TM) {
+ const MRegisterInfo *MRI = 0;
+
+ if (TM) MRI = TM->getRegisterInfo();
+
+ switch (MO.getType()) {
+ case MachineOperand::MO_Register:
+ OutputReg(OS, MO.getReg(), MRI);
+ break;
+ case MachineOperand::MO_Immediate:
+ OS << MO.getImmedValue();
+ break;
+ case MachineOperand::MO_MachineBasicBlock:
+ OS << "mbb<"
+ << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
+ << "," << (void*)MO.getMachineBasicBlock() << ">";
+ break;
+ case MachineOperand::MO_FrameIndex:
+ OS << "<fi#" << MO.getFrameIndex() << ">";
+ break;
+ case MachineOperand::MO_ConstantPoolIndex:
+ OS << "<cp#" << MO.getConstantPoolIndex() << ">";
+ break;
+ case MachineOperand::MO_JumpTableIndex:
+ OS << "<jt#" << MO.getJumpTableIndex() << ">";
+ break;
+ case MachineOperand::MO_GlobalAddress:
+ OS << "<ga:" << ((Value*)MO.getGlobal())->getName();
+ if (MO.getOffset()) OS << "+" << MO.getOffset();
+ OS << ">";
+ break;
+ case MachineOperand::MO_ExternalSymbol:
+ OS << "<es:" << MO.getSymbolName();
+ if (MO.getOffset()) OS << "+" << MO.getOffset();
+ OS << ">";
+ break;
+ default:
+ assert(0 && "Unrecognized operand type");
}
-
- return os << "\n";
}
-std::ostream &operator<<(std::ostream &os, const MachineOperand &mop)
-{
- if (mop.opHiBits32())
- os << "%lm(";
- else if (mop.opLoBits32())
- os << "%lo(";
- else if (mop.opHiBits64())
- os << "%hh(";
- else if (mop.opLoBits64())
- os << "%hm(";
-
- switch(mop.opType)
- {
- case MachineOperand::MO_VirtualRegister:
- os << "%reg";
- OutputValue(os, mop.getVRegValue());
- break;
- case MachineOperand::MO_CCRegister:
- os << "%ccreg";
- OutputValue(os, mop.getVRegValue());
- break;
- case MachineOperand::MO_MachineRegister:
- os << "%reg";
- os << "(" << mop.getMachineRegNum() << ")";
- break;
- case MachineOperand::MO_SignExtendedImmed:
- os << (long)mop.immedVal;
- break;
- case MachineOperand::MO_UnextendedImmed:
- os << (long)mop.immedVal;
- break;
- case MachineOperand::MO_PCRelativeDisp:
- {
- const Value* opVal = mop.getVRegValue();
- bool isLabel = isa<Function>(opVal) || isa<BasicBlock>(opVal);
- os << "%disp(" << (isLabel? "label " : "addr-of-val ");
- if (opVal->hasName())
- os << opVal->getName();
- else
- os << (const void*) opVal;
- os << ")";
- break;
+void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
+ unsigned StartOp = 0;
+
+ // Specialize printing if op#0 is definition
+ if (getNumOperands() && getOperand(0).isReg() && getOperand(0).isDef()) {
+ ::print(getOperand(0), OS, TM);
+ OS << " = ";
+ ++StartOp; // Don't print this operand again!
+ }
+
+ // Must check if Target machine is not null because machine BB could not
+ // be attached to a Machine function yet
+ if (TM)
+ OS << TM->getInstrInfo()->getName(getOpcode());
+
+ for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
+ const MachineOperand& mop = getOperand(i);
+ if (i != StartOp)
+ OS << ",";
+ OS << " ";
+ ::print(mop, OS, TM);
+
+ if (mop.isReg()) {
+ if (mop.isDef() || mop.isKill() || mop.isDead() || mop.isImplicit()) {
+ OS << "<";
+ bool NeedComma = false;
+ if (mop.isImplicit()) {
+ OS << (mop.isDef() ? "imp-def" : "imp-use");
+ NeedComma = true;
+ } else if (mop.isDef()) {
+ OS << "def";
+ NeedComma = true;
+ }
+ if (mop.isKill() || mop.isDead()) {
+ if (NeedComma)
+ OS << ",";
+ if (mop.isKill())
+ OS << "kill";
+ if (mop.isDead())
+ OS << "dead";
+ }
+ OS << ">";
}
- default:
- assert(0 && "Unrecognized operand type");
- break;
}
-
- if (mop.flags &
- (MachineOperand::HIFLAG32 | MachineOperand::LOFLAG32 |
- MachineOperand::HIFLAG64 | MachineOperand::LOFLAG64))
- os << ")";
-
- return os;
+ }
+
+ OS << "\n";
+}
+
+std::ostream &llvm::operator<<(std::ostream &os, const MachineInstr &MI) {
+ // If the instruction is embedded into a basic block, we can find the target
+ // info for the instruction.
+ if (const MachineBasicBlock *MBB = MI.getParent()) {
+ const MachineFunction *MF = MBB->getParent();
+ if (MF)
+ MI.print(os, &MF->getTarget());
+ else
+ MI.print(os, 0);
+ return os;
+ }
+
+ // Otherwise, print it out in the "raw" format without symbolic register names
+ // and such.
+ os << TargetInstrDescriptors[MI.getOpcode()].Name;
+
+ for (unsigned i = 0, N = MI.getNumOperands(); i < N; i++) {
+ os << "\t" << MI.getOperand(i);
+ if (MI.getOperand(i).isReg() && MI.getOperand(i).isDef())
+ os << "<d>";
+ }
+
+ return os << "\n";
+}
+
+std::ostream &llvm::operator<<(std::ostream &OS, const MachineOperand &MO) {
+ switch (MO.getType()) {
+ case MachineOperand::MO_Register:
+ OutputReg(OS, MO.getReg());
+ break;
+ case MachineOperand::MO_Immediate:
+ OS << (long)MO.getImmedValue();
+ break;
+ case MachineOperand::MO_MachineBasicBlock:
+ OS << "<mbb:"
+ << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
+ << "@" << (void*)MO.getMachineBasicBlock() << ">";
+ break;
+ case MachineOperand::MO_FrameIndex:
+ OS << "<fi#" << MO.getFrameIndex() << ">";
+ break;
+ case MachineOperand::MO_ConstantPoolIndex:
+ OS << "<cp#" << MO.getConstantPoolIndex() << ">";
+ break;
+ case MachineOperand::MO_JumpTableIndex:
+ OS << "<jt#" << MO.getJumpTableIndex() << ">";
+ break;
+ case MachineOperand::MO_GlobalAddress:
+ OS << "<ga:" << ((Value*)MO.getGlobal())->getName() << ">";
+ break;
+ case MachineOperand::MO_ExternalSymbol:
+ OS << "<es:" << MO.getSymbolName() << ">";
+ break;
+ default:
+ assert(0 && "Unrecognized operand type");
+ break;
+ }
+
+ return OS;
}
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