Add MachineInstr::readsWritesVirtualRegister() to determine if an instruction

[oota-llvm.git] / lib / CodeGen / MachineInstr.cpp

diff --git a/lib/CodeGen/MachineInstr.cpp b/lib/CodeGen/MachineInstr.cpp
index 595fddda6f602bfb9a3175b81b46fbb94cd04528..319059b4bbfcf3e88c129c68e3a42bb48c1ae2e0 100644 (file)
--- a/lib/CodeGen/MachineInstr.cpp
+++ b/lib/CodeGen/MachineInstr.cpp
@@ -782,27 +782,31 @@ int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill,
   return -1;
 }
 
-/// readsVirtualRegister - Return true if the MachineInstr reads the specified
-/// virtual register. Take into account that a partial define is a
-/// read-modify-write operation.
-bool MachineInstr::readsVirtualRegister(unsigned Reg) const {
-  bool PartDef = false; // Partial redefine
-  bool FullDef = false; // Full define
+/// readsWritesVirtualRegister - Return a pair of bools (reads, writes)
+/// indicating if this instruction reads or writes Reg. This also considers
+/// partial defines.
+std::pair<bool,bool>
+MachineInstr::readsWritesVirtualRegister(unsigned Reg,
+                                         SmallVectorImpl<unsigned> *Ops) const {
+  bool PartDef = false; // Partial redefine.
+  bool FullDef = false; // Full define.
+  bool Use = false;
 
   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = getOperand(i);
     if (!MO.isReg() || MO.getReg() != Reg)
       continue;
+    if (Ops)
+      Ops->push_back(i);
     if (MO.isUse())
-      return true;
-    if (MO.getSubReg())
+      Use |= !MO.isUndef();
+    else if (MO.getSubReg())
       PartDef = true;
     else
       FullDef = true;
   }
-  // A partial register definition causes a read unless the full register is
-  // also defined.
-  return PartDef && !FullDef;
+  // A partial redefine uses Reg unless there is also a full define.
+  return std::make_pair(Use || (PartDef && !FullDef), PartDef || FullDef);
 }
 
 /// findRegisterDefOperandIdx() - Returns the operand index that is a def of