#include "llvm/CodeGen/SlotIndexes.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/DataLayout.h"
-#include "llvm/IR/LeakDetector.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/MC/MCContext.h"
#include "llvm/Support/Debug.h"
}
MachineBasicBlock::~MachineBasicBlock() {
- LeakDetector::removeGarbageObject(this);
}
/// getSymbol - Return the MCSymbol for this basic block.
if (!CachedMCSymbol) {
const MachineFunction *MF = getParent();
MCContext &Ctx = MF->getContext();
- const TargetMachine &TM = MF->getTarget();
- const char *Prefix =
- TM.getSubtargetImpl()->getDataLayout()->getPrivateGlobalPrefix();
- CachedMCSymbol = Ctx.GetOrCreateSymbol(Twine(Prefix) + "BB" +
+ const char *Prefix = Ctx.getAsmInfo()->getPrivateLabelPrefix();
+ CachedMCSymbol = Ctx.getOrCreateSymbol(Twine(Prefix) + "BB" +
Twine(MF->getFunctionNumber()) +
"_" + Twine(getNumber()));
}
for (MachineBasicBlock::instr_iterator
I = N->instr_begin(), E = N->instr_end(); I != E; ++I)
I->AddRegOperandsToUseLists(RegInfo);
-
- LeakDetector::removeGarbageObject(N);
}
void ilist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock *N) {
N->getParent()->removeFromMBBNumbering(N->Number);
N->Number = -1;
- LeakDetector::addGarbageObject(N);
}
// use/def lists.
MachineFunction *MF = Parent->getParent();
N->AddRegOperandsToUseLists(MF->getRegInfo());
-
- LeakDetector::removeGarbageObject(N);
}
/// removeNodeFromList (MI) - When we remove an instruction from a basic block
N->RemoveRegOperandsFromUseLists(MF->getRegInfo());
N->setParent(nullptr);
-
- LeakDetector::addGarbageObject(N);
}
/// transferNodesFromList (MI) - When moving a range of instructions from one
if (getBasicBlock())
Name += getBasicBlock()->getName();
else
- Name += (Twine("BB") + Twine(getNumber())).str();
+ Name += ("BB" + Twine(getNumber())).str();
return Name;
}
OS << '\n';
- const TargetRegisterInfo *TRI =
- MF->getTarget().getSubtargetImpl()->getRegisterInfo();
+ const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
if (!livein_empty()) {
if (Indexes) OS << '\t';
OS << " Live Ins:";
OS << '\t';
if (I->isInsideBundle())
OS << " * ";
- I->print(OS, &getParent()->getTarget());
+ I->print(OS);
}
// Print the successors of this block according to the CFG.
bool LiveIn = isLiveIn(PhysReg);
iterator I = SkipPHIsAndLabels(begin()), E = end();
MachineRegisterInfo &MRI = getParent()->getRegInfo();
- const TargetInstrInfo &TII =
- *getParent()->getTarget().getSubtargetImpl()->getInstrInfo();
+ const TargetInstrInfo &TII = *getParent()->getSubtarget().getInstrInfo();
// Look for an existing copy.
if (LiveIn)
}
void MachineBasicBlock::updateTerminator() {
- const TargetInstrInfo *TII =
- getParent()->getTarget().getSubtargetImpl()->getInstrInfo();
+ const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
// A block with no successors has no concerns with fall-through edges.
if (this->succ_empty()) return;
// Analyze the branches, if any, at the end of the block.
MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
SmallVector<MachineOperand, 4> Cond;
- const TargetInstrInfo *TII =
- getParent()->getTarget().getSubtargetImpl()->getInstrInfo();
+ const TargetInstrInfo *TII = getParent()->getSubtarget().getInstrInfo();
if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) {
// If we couldn't analyze the branch, examine the last instruction.
// If the block doesn't end in a known control barrier, assume fallthrough
// We may need to update this's terminator, but we can't do that if
// AnalyzeBranch fails. If this uses a jump table, we won't touch it.
- const TargetInstrInfo *TII =
- MF->getTarget().getSubtargetImpl()->getInstrInfo();
+ const TargetInstrInfo *TII = MF->getSubtarget().getInstrInfo();
MachineBasicBlock *TBB = nullptr, *FBB = nullptr;
SmallVector<MachineOperand, 4> Cond;
if (TII->AnalyzeBranch(*this, TBB, FBB, Cond))
NMBB->addSuccessor(Succ);
if (!NMBB->isLayoutSuccessor(Succ)) {
Cond.clear();
- MF->getTarget().getSubtargetImpl()->getInstrInfo()->InsertBranch(
- *NMBB, Succ, nullptr, Cond, dl);
+ MF->getSubtarget().getInstrInfo()->InsertBranch(*NMBB, Succ, nullptr, Cond,
+ dl);
if (Indexes) {
for (instr_iterator I = NMBB->instr_begin(), E = NMBB->instr_end();
NMBB->addLiveIn(*I);
// Update LiveVariables.
- const TargetRegisterInfo *TRI =
- MF->getTarget().getSubtargetImpl()->getRegisterInfo();
+ const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
if (LV) {
// Restore kills of virtual registers that were killed by the terminators.
while (!KilledRegs.empty()) {
}
if (MachineDominatorTree *MDT =
- P->getAnalysisIfAvailable<MachineDominatorTree>()) {
- // Update dominator information.
- MachineDomTreeNode *SucccDTNode = MDT->getNode(Succ);
-
- bool IsNewIDom = true;
- for (const_pred_iterator PI = Succ->pred_begin(), E = Succ->pred_end();
- PI != E; ++PI) {
- MachineBasicBlock *PredBB = *PI;
- if (PredBB == NMBB)
- continue;
- if (!MDT->dominates(SucccDTNode, MDT->getNode(PredBB))) {
- IsNewIDom = false;
- break;
- }
- }
-
- // We know "this" dominates the newly created basic block.
- MachineDomTreeNode *NewDTNode = MDT->addNewBlock(NMBB, this);
-
- // If all the other predecessors of "Succ" are dominated by "Succ" itself
- // then the new block is the new immediate dominator of "Succ". Otherwise,
- // the new block doesn't dominate anything.
- if (IsNewIDom)
- MDT->changeImmediateDominator(SucccDTNode, NewDTNode);
- }
+ P->getAnalysisIfAvailable<MachineDominatorTree>())
+ MDT->recordSplitCriticalEdge(this, Succ, NMBB);
if (MachineLoopInfo *MLI = P->getAnalysisIfAvailable<MachineLoopInfo>())
if (MachineLoop *TIL = MLI->getLoopFor(this)) {
MachineBasicBlock::succ_iterator SI = succ_begin();
while (SI != succ_end()) {
const MachineBasicBlock *MBB = *SI;
- if (!SeenMBBs.insert(MBB) ||
+ if (!SeenMBBs.insert(MBB).second ||
(MBB != DestA && MBB != DestB && !MBB->isLandingPad())) {
// This is a superfluous edge, remove it.
SI = removeSuccessor(SI);
/// instructions after (searching just for defs) MI.
MachineBasicBlock::LivenessQueryResult
MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI,
- unsigned Reg, MachineInstr *MI,
- unsigned Neighborhood) {
+ unsigned Reg, const_iterator Before,
+ unsigned Neighborhood) const {
unsigned N = Neighborhood;
- MachineBasicBlock *MBB = MI->getParent();
-
- // Start by searching backwards from MI, looking for kills, reads or defs.
- MachineBasicBlock::iterator I(MI);
+ // Start by searching backwards from Before, looking for kills, reads or defs.
+ const_iterator I(Before);
// If this is the first insn in the block, don't search backwards.
- if (I != MBB->begin()) {
+ if (I != begin()) {
do {
--I;
MachineOperandIteratorBase::PhysRegInfo Analysis =
- MIOperands(I).analyzePhysReg(Reg, TRI);
+ ConstMIOperands(I).analyzePhysReg(Reg, TRI);
if (Analysis.Defines)
// Outputs happen after inputs so they take precedence if both are
// Defined or read without a previous kill - live.
return Analysis.Reads ? LQR_Live : LQR_OverlappingLive;
- } while (I != MBB->begin() && --N > 0);
+ } while (I != begin() && --N > 0);
}
// Did we get to the start of the block?
- if (I == MBB->begin()) {
+ if (I == begin()) {
// If so, the register's state is definitely defined by the live-in state.
for (MCRegAliasIterator RAI(Reg, TRI, /*IncludeSelf=*/true);
RAI.isValid(); ++RAI) {
- if (MBB->isLiveIn(*RAI))
+ if (isLiveIn(*RAI))
return (*RAI == Reg) ? LQR_Live : LQR_OverlappingLive;
}
N = Neighborhood;
- // Try searching forwards from MI, looking for reads or defs.
- I = MachineBasicBlock::iterator(MI);
+ // Try searching forwards from Before, looking for reads or defs.
+ I = const_iterator(Before);
// If this is the last insn in the block, don't search forwards.
- if (I != MBB->end()) {
- for (++I; I != MBB->end() && N > 0; ++I, --N) {
+ if (I != end()) {
+ for (++I; I != end() && N > 0; ++I, --N) {
MachineOperandIteratorBase::PhysRegInfo Analysis =
- MIOperands(I).analyzePhysReg(Reg, TRI);
+ ConstMIOperands(I).analyzePhysReg(Reg, TRI);
if (Analysis.ReadsOverlap)
// Used, therefore must have been live.
projects / oota-llvm.git / blobdiff