MIR Serialization: Serialize the floating point immediate machine operands.

[oota-llvm.git] / lib / CodeGen / MIRPrinter.cpp

diff --git a/lib/CodeGen/MIRPrinter.cpp b/lib/CodeGen/MIRPrinter.cpp
index 84cf09f904c5a64c9521fcf0695ee2b099237817..664a0f532e9616f2ff3d012dd063ea23f12de721 100644 (file)
--- a/lib/CodeGen/MIRPrinter.cpp
+++ b/lib/CodeGen/MIRPrinter.cpp
@@ -56,6 +56,10 @@ struct FrameIndexOperand {
   }
 };
 
+} // end anonymous namespace
+
+namespace llvm {
+
 /// This class prints out the machine functions using the MIR serialization
 /// format.
 class MIRPrinter {
@@ -88,6 +92,10 @@ private:
   void initRegisterMaskIds(const MachineFunction &MF);
 };
 
+} // end namespace llvm
+
+namespace {
+
 /// This class prints out the machine instructions using the MIR serialization
 /// format.
 class MIPrinter {
@@ -363,6 +371,11 @@ void MIRPrinter::convert(ModuleSlotTracker &MST,
         .printMBBReference(*SuccMBB);
     YamlMBB.Successors.push_back(StrOS.str());
   }
+  if (MBB.hasSuccessorWeights()) {
+    for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I)
+      YamlMBB.SuccessorWeights.push_back(
+          yaml::UnsignedValue(MBB.getSuccWeight(I)));
+  }
   // Print the live in registers.
   const auto *TRI = MBB.getParent()->getSubtarget().getRegisterInfo();
   assert(TRI && "Expected target register info");
@@ -500,6 +513,9 @@ void MIPrinter::print(const MachineOperand &Op, const TargetRegisterInfo *TRI) {
   case MachineOperand::MO_Immediate:
     OS << Op.getImm();
     break;
+  case MachineOperand::MO_FPImmediate:
+    Op.getFPImm()->printAsOperand(OS, /*PrintType=*/true, MST);
+    break;
   case MachineOperand::MO_MachineBasicBlock:
     printMBBReference(*Op.getMBB());
     break;