#include <algorithm>
using namespace llvm;
+char LiveVariables::ID = 0;
static RegisterPass<LiveVariables> X("livevars", "Live Variable Analysis");
void LiveVariables::VarInfo::dump() const {
}
void LiveVariables::MarkVirtRegAliveInBlock(VarInfo &VRInfo,
- MachineBasicBlock *MBB) {
+ MachineBasicBlock *MBB,
+ std::vector<MachineBasicBlock*> &WorkList) {
unsigned BBNum = MBB->getNumber();
// Check to see if this basic block is one of the killing blocks. If so,
// Mark the variable known alive in this bb
VRInfo.AliveBlocks[BBNum] = true;
- for (MachineBasicBlock::const_pred_iterator PI = MBB->pred_begin(),
- E = MBB->pred_end(); PI != E; ++PI)
- MarkVirtRegAliveInBlock(VRInfo, *PI);
+ for (MachineBasicBlock::const_pred_reverse_iterator PI = MBB->pred_rbegin(),
+ E = MBB->pred_rend(); PI != E; ++PI)
+ WorkList.push_back(*PI);
+}
+
+void LiveVariables::MarkVirtRegAliveInBlock(VarInfo &VRInfo,
+ MachineBasicBlock *MBB) {
+ std::vector<MachineBasicBlock*> WorkList;
+ MarkVirtRegAliveInBlock(VRInfo, MBB, WorkList);
+ while (!WorkList.empty()) {
+ MachineBasicBlock *Pred = WorkList.back();
+ WorkList.pop_back();
+ MarkVirtRegAliveInBlock(VRInfo, Pred, WorkList);
+ }
}
+
void LiveVariables::HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
MachineInstr *MI) {
assert(VRInfo.DefInst && "Register use before def!");
MarkVirtRegAliveInBlock(VRInfo, *PI);
}
-void LiveVariables::addRegisterKilled(unsigned IncomingReg, MachineInstr *MI) {
+bool LiveVariables::addRegisterKilled(unsigned IncomingReg, MachineInstr *MI,
+ bool AddIfNotFound) {
bool Found = false;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
RegInfo->isSuperRegister(IncomingReg, Reg) &&
MO.isKill())
// A super-register kill already exists.
- return;
+ return true;
}
}
// If not found, this means an alias of one of the operand is killed. Add a
- // new implicit operand.
- if (!Found)
+ // new implicit operand if required.
+ if (!Found && AddIfNotFound) {
MI->addRegOperand(IncomingReg, false/*IsDef*/,true/*IsImp*/,true/*IsKill*/);
+ return true;
+ }
+ return Found;
}
-void LiveVariables::addRegisterDead(unsigned IncomingReg, MachineInstr *MI) {
+bool LiveVariables::addRegisterDead(unsigned IncomingReg, MachineInstr *MI,
+ bool AddIfNotFound) {
bool Found = false;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
RegInfo->isSuperRegister(IncomingReg, Reg) &&
MO.isDead())
// There exists a super-register that's marked dead.
- return;
+ return true;
}
}
// If not found, this means an alias of one of the operand is dead. Add a
// new implicit operand.
- if (!Found)
+ if (!Found && AddIfNotFound) {
MI->addRegOperand(IncomingReg, true/*IsDef*/,true/*IsImp*/,false/*IsKill*/,
true/*IsDead*/);
+ return true;
+ }
+ return Found;
}
void LiveVariables::HandlePhysRegUse(unsigned Reg, MachineInstr *MI) {
addRegisterKilled(Reg, LastRef);
else if (PhysRegPartUse[Reg])
// Add implicit use / kill to last use of a sub-register.
- addRegisterKilled(Reg, PhysRegPartUse[Reg]);
+ addRegisterKilled(Reg, PhysRegPartUse[Reg], true);
else
addRegisterDead(Reg, LastRef);
}
addRegisterKilled(SubReg, LastRef);
else if (PhysRegPartUse[SubReg])
// Add implicit use / kill to last use of a sub-register.
- addRegisterKilled(SubReg, PhysRegPartUse[SubReg]);
+ addRegisterKilled(SubReg, PhysRegPartUse[SubReg], true);
else
addRegisterDead(SubReg, LastRef);
}
PhysRegInfo[SubReg] = MI;
PhysRegUsed[SubReg] = false;
+ PhysRegPartUse[SubReg] = NULL;
}
if (MI)
MI->addRegOperand(SuperReg, true/*IsDef*/,true/*IsImp*/);
PhysRegInfo[SuperReg] = MI;
PhysRegUsed[SuperReg] = false;
+ PhysRegPartUse[SuperReg] = NULL;
} else {
// Remember this partial def.
PhysRegPartDef[SuperReg].push_back(MI);
ReservedRegisters = RegInfo->getReservedRegs(mf);
- PhysRegInfo.resize(RegInfo->getNumRegs(), (MachineInstr*)NULL);
- PhysRegUsed.resize(RegInfo->getNumRegs());
- PhysRegPartDef.resize(RegInfo->getNumRegs());
- PhysRegPartUse.resize(RegInfo->getNumRegs(), (MachineInstr*)NULL);
+ unsigned NumRegs = RegInfo->getNumRegs();
+ PhysRegInfo = new MachineInstr*[NumRegs];
+ PhysRegUsed = new bool[NumRegs];
+ PhysRegPartUse = new MachineInstr*[NumRegs];
+ PhysRegPartDef = new SmallVector<MachineInstr*,4>[NumRegs];
+ PHIVarInfo = new SmallVector<unsigned, 4>[MF->getNumBlockIDs()];
+ std::fill(PhysRegInfo, PhysRegInfo + NumRegs, (MachineInstr*)0);
+ std::fill(PhysRegUsed, PhysRegUsed + NumRegs, false);
+ std::fill(PhysRegPartUse, PhysRegPartUse + NumRegs, (MachineInstr*)0);
/// Get some space for a respectable number of registers...
VirtRegInfo.resize(64);
// bottom of this basic block. We check all of our successor blocks to see
// if they have PHI nodes, and if so, we simulate an assignment at the end
// of the current block.
- if (!PHIVarInfo[MBB].empty()) {
- std::vector<unsigned>& VarInfoVec = PHIVarInfo[MBB];
+ if (!PHIVarInfo[MBB->getNumber()].empty()) {
+ SmallVector<unsigned, 4>& VarInfoVec = PHIVarInfo[MBB->getNumber()];
- for (std::vector<unsigned>::iterator I = VarInfoVec.begin(),
+ for (SmallVector<unsigned, 4>::iterator I = VarInfoVec.begin(),
E = VarInfoVec.end(); I != E; ++I) {
VarInfo& VRInfo = getVarInfo(*I);
assert(VRInfo.DefInst && "Register use before def (or no def)!");
"Cannot have a live-in virtual register!");
HandlePhysRegUse(*I, Ret);
// Add live-out registers as implicit uses.
- Ret->addRegOperand(*I, false, true);
+ if (Ret->findRegisterUseOperandIdx(*I) == -1)
+ Ret->addRegOperand(*I, false, true);
}
}
// Loop over PhysRegInfo, killing any registers that are available at the
// end of the basic block. This also resets the PhysRegInfo map.
- for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i)
+ for (unsigned i = 0; i != NumRegs; ++i)
if (PhysRegInfo[i])
HandlePhysRegDef(i, 0);
// Clear some states between BB's. These are purely local information.
- for (unsigned i = 0, e = RegInfo->getNumRegs(); i != e; ++i) {
+ for (unsigned i = 0; i != NumRegs; ++i)
PhysRegPartDef[i].clear();
- PhysRegPartUse[i] = NULL;
- }
+ std::fill(PhysRegPartUse, PhysRegPartUse + NumRegs, (MachineInstr*)0);
}
// Convert and transfer the dead / killed information we have gathered into
assert(Visited.count(&*i) != 0 && "unreachable basic block found");
#endif
- PHIVarInfo.clear();
+ delete[] PhysRegInfo;
+ delete[] PhysRegUsed;
+ delete[] PhysRegPartUse;
+ delete[] PhysRegPartDef;
+ delete[] PHIVarInfo;
+
return false;
}
for (MachineBasicBlock::const_iterator BBI = I->begin(), BBE = I->end();
BBI != BBE && BBI->getOpcode() == TargetInstrInfo::PHI; ++BBI)
for (unsigned i = 1, e = BBI->getNumOperands(); i != e; i += 2)
- PHIVarInfo[BBI->getOperand(i + 1).getMachineBasicBlock()].
+ PHIVarInfo[BBI->getOperand(i + 1).getMachineBasicBlock()->getNumber()].
push_back(BBI->getOperand(i).getReg());
}
projects / oota-llvm.git / blobdiff