Fix this warning:

[oota-llvm.git] / lib / CodeGen / LLVMTargetMachine.cpp

diff --git a/lib/CodeGen/LLVMTargetMachine.cpp b/lib/CodeGen/LLVMTargetMachine.cpp
index 2f250c8a889785067427a80958432538a742138f..500f0e0941c35bb451117d00fd87f626b7cde698 100644 (file)
--- a/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/lib/CodeGen/LLVMTargetMachine.cpp
@@ -14,78 +14,113 @@
 #include "llvm/Target/TargetMachine.h"
 #include "llvm/PassManager.h"
 #include "llvm/Pass.h"
+#include "llvm/Assembly/PrintModulePass.h"
+#include "llvm/Analysis/LoopPass.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/Target/TargetOptions.h"
 #include "llvm/Transforms/Scalar.h"
-#include <iostream>
+#include "llvm/Support/CommandLine.h"
 using namespace llvm;
 
-bool LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
-                                            std::ostream &Out,
-                                            CodeGenFileType FileType,
-                                            bool Fast) {
+static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
+    cl::desc("Print LLVM IR produced by the loop-reduce pass"));
+static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
+    cl::desc("Print LLVM IR input to isel pass"));
+
+FileModel::Model
+LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
+                                       std::ostream &Out,
+                                       CodeGenFileType FileType,
+                                       bool Fast) {
   // Standard LLVM-Level Passes.
   
   // Run loop strength reduction before anything else.
-  if (!Fast) PM.add(createLoopStrengthReducePass(getTargetLowering()));
+  if (!Fast) {
+    PM.add(createLoopStrengthReducePass(getTargetLowering()));
+    if (PrintLSR)
+      PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr));
+  }
   
   // FIXME: Implement efficient support for garbage collection intrinsics.
   PM.add(createLowerGCPass());
   
   // FIXME: Implement the invoke/unwind instructions!
-  PM.add(createLowerInvokePass());
+  if (!ExceptionHandling)
+    PM.add(createLowerInvokePass(getTargetLowering()));
   
   // Make sure that no unreachable blocks are instruction selected.
   PM.add(createUnreachableBlockEliminationPass());
-  
+
+  if (!Fast)
+    PM.add(createCodeGenPreparePass(getTargetLowering()));
+
+  if (PrintISelInput)
+    PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n",
+                                 &cerr));
   
   // Ask the target for an isel.
   if (addInstSelector(PM, Fast))
-    return true;
-  
-  
+    return FileModel::Error;
+
   // Print the instruction selected machine code...
   if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
+    PM.add(createMachineFunctionPrinterPass(cerr));
   
   // Perform register allocation to convert to a concrete x86 representation
   PM.add(createRegisterAllocator());
   
   if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-  
-  
+    PM.add(createMachineFunctionPrinterPass(cerr));
+
   // Run post-ra passes.
   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-  
-  
+    PM.add(createMachineFunctionPrinterPass(cerr));
+
   // Insert prolog/epilog code.  Eliminate abstract frame index references...
   PM.add(createPrologEpilogCodeInserter());
   
-  if (PrintMachineCode)  // Print the register-allocated code
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-  
+  // Branch folding must be run after regalloc and prolog/epilog insertion.
+  if (!Fast)
+    PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
+    
+  // Fold redundant debug labels.
+  PM.add(createDebugLabelFoldingPass());
   
+  if (PrintMachineCode)  // Print the register-allocated code
+    PM.add(createMachineFunctionPrinterPass(cerr));
+
   if (addPreEmitPass(PM, Fast) && PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-  
-  
+    PM.add(createMachineFunctionPrinterPass(cerr));
+
   switch (FileType) {
-    default: return true;
-    case TargetMachine::AssemblyFile:
-      if (addAssemblyEmitter(PM, Fast, Out))
-        return true;
-      break;
-    case TargetMachine::ObjectFile:
-      if (addObjectWriter(PM, Fast, Out))
-        return true;
-      break;
+  default:
+    break;
+  case TargetMachine::AssemblyFile:
+    if (addAssemblyEmitter(PM, Fast, Out))
+      return FileModel::Error;
+    return FileModel::AsmFile;
+  case TargetMachine::ObjectFile:
+    if (getMachOWriterInfo())
+      return FileModel::MachOFile;
+    else if (getELFWriterInfo())
+      return FileModel::ElfFile;
   }
-  
+
+  return FileModel::Error;
+}
+ 
+/// addPassesToEmitFileFinish - If the passes to emit the specified file had to
+/// be split up (e.g., to add an object writer pass), this method can be used to
+/// finish up adding passes to emit the file, if necessary.
+bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM,
+                                                  MachineCodeEmitter *MCE,
+                                                  bool Fast) {
+  if (MCE)
+    addSimpleCodeEmitter(PM, Fast, *MCE);
+
   // Delete machine code for this function
   PM.add(createMachineCodeDeleter());
-  
+
   return false; // success!
 }
 
@@ -101,50 +136,59 @@ bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
   // Standard LLVM-Level Passes.
   
   // Run loop strength reduction before anything else.
-  if (!Fast) PM.add(createLoopStrengthReducePass(getTargetLowering()));
+  if (!Fast) {
+    PM.add(createLoopStrengthReducePass(getTargetLowering()));
+    if (PrintLSR)
+      PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr));
+  }
   
   // FIXME: Implement efficient support for garbage collection intrinsics.
   PM.add(createLowerGCPass());
   
   // FIXME: Implement the invoke/unwind instructions!
-  PM.add(createLowerInvokePass());
+  PM.add(createLowerInvokePass(getTargetLowering()));
   
   // Make sure that no unreachable blocks are instruction selected.
   PM.add(createUnreachableBlockEliminationPass());
-  
-  
+
+  if (!Fast)
+    PM.add(createCodeGenPreparePass(getTargetLowering()));
+
+  if (PrintISelInput)
+    PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n",
+                                 &cerr));
+
   // Ask the target for an isel.
   if (addInstSelector(PM, Fast))
     return true;
-  
-  
+
   // Print the instruction selected machine code...
   if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
+    PM.add(createMachineFunctionPrinterPass(cerr));
   
   // Perform register allocation to convert to a concrete x86 representation
   PM.add(createRegisterAllocator());
   
   if (PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-  
-  
+    PM.add(createMachineFunctionPrinterPass(cerr));
+
   // Run post-ra passes.
   if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-  
-  
+    PM.add(createMachineFunctionPrinterPass(cerr));
+
   // Insert prolog/epilog code.  Eliminate abstract frame index references...
   PM.add(createPrologEpilogCodeInserter());
   
   if (PrintMachineCode)  // Print the register-allocated code
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
+    PM.add(createMachineFunctionPrinterPass(cerr));
   
+  // Branch folding must be run after regalloc and prolog/epilog insertion.
+  if (!Fast)
+    PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
   
   if (addPreEmitPass(PM, Fast) && PrintMachineCode)
-    PM.add(createMachineFunctionPrinterPass(&std::cerr));
-  
-  
+    PM.add(createMachineFunctionPrinterPass(cerr));
+
   addCodeEmitter(PM, Fast, MCE);
   
   // Delete machine code for this function