#define DEBUG_TYPE "execution-fix"
#include "llvm/CodeGen/Passes.h"
#include "llvm/ADT/PostOrderIterator.h"
-#include "llvm/CodeGen/LivePhysRegs.h"
+#include "llvm/CodeGen/LiveRegUnits.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/Support/Allocator.h"
std::vector<std::pair<MachineInstr*, unsigned> > UndefReads;
/// Storage for register unit liveness.
- LivePhysRegs LiveRegSet;
+ LiveRegUnits LiveUnits;
/// Current instruction number.
/// The first instruction in each basic block is 0.
// Set up UndefReads to track undefined register reads.
UndefReads.clear();
- LiveRegSet.clear();
+ LiveUnits.clear();
// Set up LiveRegs to represent registers entering MBB.
if (!LiveRegs)
return;
// Collect this block's live out register units.
- LiveRegSet.init(TRI);
- LiveRegSet.addLiveOuts(MBB);
-
+ LiveUnits.init(TRI);
+ for (MachineBasicBlock::const_succ_iterator SI = MBB->succ_begin(),
+ SE = MBB->succ_end(); SI != SE; ++SI) {
+ LiveUnits.addLiveIns(*SI, *TRI);
+ }
MachineInstr *UndefMI = UndefReads.back().first;
unsigned OpIdx = UndefReads.back().second;
for (MachineBasicBlock::reverse_iterator I = MBB->rbegin(), E = MBB->rend();
I != E; ++I) {
// Update liveness, including the current instrucion's defs.
- LiveRegSet.stepBackward(*I);
+ LiveUnits.stepBackward(*I, *TRI);
if (UndefMI == &*I) {
- if (!LiveRegSet.contains(UndefMI->getOperand(OpIdx).getReg()))
+ if (!LiveUnits.contains(UndefMI->getOperand(OpIdx).getReg(), *TRI))
TII->breakPartialRegDependency(UndefMI, OpIdx, TRI);
UndefReads.pop_back();