struct BranchFolder : public MachineFunctionPass {
static char ID;
- BranchFolder(bool defaultEnableTailMerge) :
+ explicit BranchFolder(bool defaultEnableTailMerge) :
MachineFunctionPass((intptr_t)&ID) {
switch (FlagEnableTailMerge) {
case cl::BOU_UNSET: EnableTailMerge = defaultEnableTailMerge; break;
unsigned TailLen = 0;
while (I1 != MBB1->begin() && I2 != MBB2->begin()) {
--I1; --I2;
- if (!I1->isIdenticalTo(I2)) {
+ if (!I1->isIdenticalTo(I2) ||
+ // FIXME: This check is dubious. It's used to get around a problem where
+ // people incorrectly expect inline asm directives to remain in the same
+ // relative order. This is untenable because normal compiler
+ // optimizations (like this one) may reorder and/or merge these
+ // directives.
+ I1->getOpcode() == TargetInstrInfo::INLINEASM) {
++I1; ++I2;
break;
}
return true;
else if (p.second->getNumber() > q.second->getNumber())
return false;
- else
+ else {
+ // _GLIBCXX_DEBUG checks strict weak ordering, which involves comparing
+ // an object with itself.
+#ifndef _GLIBCXX_DEBUG
assert(0 && "Predecessor appears twice");
+#endif
+ return(false);
+ }
}
// See if any of the blocks in MergePotentials (which all have a common single
// optimize branches that branch to either a return block or an assert block
// into a fallthrough to the return.
if (MBB1->empty() || MBB2->empty()) return false;
+
+ // If there is a clear successor ordering we make sure that one block
+ // will fall through to the next
+ if (MBB1->isSuccessor(MBB2)) return true;
+ if (MBB2->isSuccessor(MBB1)) return false;
MachineInstr *MBB1I = --MBB1->end();
MachineInstr *MBB2I = --MBB2->end();