//
//===----------------------------------------------------------------------===//
-#define DEBUG_TYPE "asm-printer"
+#include "ByteStreamer.h"
+#include "DwarfExpression.h"
#include "llvm/CodeGen/AsmPrinter.h"
-#include "llvm/ADT/SmallBitVector.h"
#include "llvm/ADT/Twine.h"
#include "llvm/IR/DataLayout.h"
#include "llvm/MC/MCAsmInfo.h"
#include "llvm/Target/TargetLoweringObjectFile.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetRegisterInfo.h"
+#include "llvm/Target/TargetSubtargetInfo.h"
using namespace llvm;
+#define DEBUG_TYPE "asm-printer"
+
+/// DwarfExpression implementation for .debug_loc entries.
+class DebugLocDwarfExpression : public DwarfExpression {
+ ByteStreamer &BS;
+public:
+ DebugLocDwarfExpression(TargetMachine &TM, ByteStreamer &BS)
+ : DwarfExpression(TM), BS(BS) {}
+
+ void EmitOp(uint8_t Op, const char* Comment) override;
+ void EmitSigned(int Value) override;
+ void EmitUnsigned(unsigned Value) override;
+ unsigned getFrameRegister() override {
+ llvm_unreachable("not available");
+ };
+};
+
+void DebugLocDwarfExpression::EmitOp(uint8_t Op, const char* Comment) {
+ BS.EmitInt8(Op, Comment
+ ? Twine(Comment)+" "+dwarf::OperationEncodingString(Op)
+ : dwarf::OperationEncodingString(Op));
+}
+void DebugLocDwarfExpression::EmitSigned(int Value) {
+ BS.EmitSLEB128(Value, Twine(Value));
+}
+void DebugLocDwarfExpression::EmitUnsigned(unsigned Value) {
+ BS.EmitULEB128(Value, Twine(Value));
+}
+
+
//===----------------------------------------------------------------------===//
// Dwarf Emission Helper Routines
//===----------------------------------------------------------------------===//
default:
llvm_unreachable("Invalid encoded value.");
case dwarf::DW_EH_PE_absptr:
- return TM.getDataLayout()->getPointerSize();
+ return TM.getSubtargetImpl()->getDataLayout()->getPointerSize();
case dwarf::DW_EH_PE_udata2:
return 2;
case dwarf::DW_EH_PE_udata4:
EmitLabelDifference(Label, SectionLabel, 4);
}
-
-/// Emit a dwarf register operation.
-static void emitDwarfRegOp(const AsmPrinter &AP, int Reg) {
- assert(Reg >= 0);
- if (Reg < 32) {
- AP.OutStreamer.AddComment(
- dwarf::OperationEncodingString(dwarf::DW_OP_reg0 + Reg));
- AP.EmitInt8(dwarf::DW_OP_reg0 + Reg);
- } else {
- AP.OutStreamer.AddComment("DW_OP_regx");
- AP.EmitInt8(dwarf::DW_OP_regx);
- AP.OutStreamer.AddComment(Twine(Reg));
- AP.EmitULEB128(Reg);
- }
-}
-
-/// Emit an (double-)indirect dwarf register operation.
-static void emitDwarfRegOpIndirect(const AsmPrinter &AP,
- int Reg, int Offset, bool Deref) {
- assert(Reg >= 0);
- if (Reg < 32) {
- AP.OutStreamer.AddComment(
- dwarf::OperationEncodingString(dwarf::DW_OP_breg0 + Reg));
- AP.EmitInt8(dwarf::DW_OP_breg0 + Reg);
- } else {
- AP.OutStreamer.AddComment("DW_OP_bregx");
- AP.EmitInt8(dwarf::DW_OP_bregx);
- AP.OutStreamer.AddComment(Twine(Reg));
- AP.EmitULEB128(Reg);
- }
- AP.EmitSLEB128(Offset);
- if (Deref)
- AP.EmitInt8(dwarf::DW_OP_deref);
-}
-
-/// Emit a dwarf register operation for describing
-/// - a small value occupying only part of a register or
-/// - a small register representing only part of a value.
-static void emitDwarfOpPiece(const AsmPrinter &AP,
- unsigned Size, unsigned Offset) {
- assert(Size > 0);
- if (Offset > 0) {
- AP.OutStreamer.AddComment("DW_OP_bit_piece");
- AP.EmitInt8(dwarf::DW_OP_bit_piece);
- AP.OutStreamer.AddComment(Twine(Size));
- AP.EmitULEB128(Size);
- AP.OutStreamer.AddComment(Twine(Offset));
- AP.EmitULEB128(Offset);
- } else {
- AP.OutStreamer.AddComment("DW_OP_piece");
- AP.EmitInt8(dwarf::DW_OP_piece);
- unsigned ByteSize = Size / 8; // Assuming 8 bits per byte.
- AP.OutStreamer.AddComment(Twine(ByteSize));
- AP.EmitULEB128(ByteSize);
- }
+// Some targets do not provide a DWARF register number for every
+// register. This function attempts to emit a DWARF register by
+// emitting a piece of a super-register or by piecing together
+// multiple subregisters that alias the register.
+void AsmPrinter::EmitDwarfRegOpPiece(ByteStreamer &Streamer,
+ const MachineLocation &MLoc,
+ unsigned PieceSizeInBits,
+ unsigned PieceOffsetInBits) const {
+ assert(MLoc.isReg() && "MLoc must be a register");
+ DebugLocDwarfExpression Expr(TM, Streamer);
+ Expr.AddMachineRegPiece(MLoc.getReg(), PieceSizeInBits, PieceOffsetInBits);
}
-/// Some targets do not provide a DWARF register number for every
-/// register. This function attempts to emit a dwarf register by
-/// emitting a piece of a super-register or by piecing together
-/// multiple subregisters that alias the register.
-static void EmitDwarfRegOpPiece(const AsmPrinter &AP,
- const MachineLocation &MLoc) {
- assert(!MLoc.isIndirect());
- const TargetRegisterInfo *TRI = AP.TM.getRegisterInfo();
- int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false);
-
- // Walk up the super-register chain until we find a valid number.
- // For example, EAX on x86_64 is a 32-bit piece of RAX with offset 0.
- for (MCSuperRegIterator SR(MLoc.getReg(), TRI); SR.isValid(); ++SR) {
- Reg = TRI->getDwarfRegNum(*SR, false);
- if (Reg >= 0) {
- unsigned Idx = TRI->getSubRegIndex(*SR, MLoc.getReg());
- unsigned Size = TRI->getSubRegIdxSize(Idx);
- unsigned Offset = TRI->getSubRegIdxOffset(Idx);
- AP.OutStreamer.AddComment("super-register");
- emitDwarfRegOp(AP, Reg);
- emitDwarfOpPiece(AP, Size, Offset);
- return;
- }
- }
-
- // Otherwise, attempt to find a covering set of sub-register numbers.
- // For example, Q0 on ARM is a composition of D0+D1.
- //
- // Keep track of the current position so we can emit the more
- // efficient DW_OP_piece.
- unsigned CurPos = 0;
- // The size of the register in bits, assuming 8 bits per byte.
- unsigned RegSize = TRI->getMinimalPhysRegClass(MLoc.getReg())->getSize()*8;
- // Keep track of the bits in the register we already emitted, so we
- // can avoid emitting redundant aliasing subregs.
- SmallBitVector Coverage(RegSize, false);
- for (MCSubRegIterator SR(MLoc.getReg(), TRI); SR.isValid(); ++SR) {
- unsigned Idx = TRI->getSubRegIndex(MLoc.getReg(), *SR);
- unsigned Size = TRI->getSubRegIdxSize(Idx);
- unsigned Offset = TRI->getSubRegIdxOffset(Idx);
- Reg = TRI->getDwarfRegNum(*SR, false);
-
- // Intersection between the bits we already emitted and the bits
- // covered by this subregister.
- SmallBitVector Intersection(RegSize, false);
- Intersection.set(Offset, Offset+Size);
- Intersection ^= Coverage;
-
- // If this sub-register has a DWARF number and we haven't covered
- // its range, emit a DWARF piece for it.
- if (Reg >= 0 && Intersection.any()) {
- AP.OutStreamer.AddComment("sub-register");
- emitDwarfRegOp(AP, Reg);
- emitDwarfOpPiece(AP, Size, Offset == CurPos ? 0 : Offset);
- CurPos = Offset+Size;
-
- // Mark it as emitted.
- Coverage.set(Offset, Offset+Size);
- }
- }
-
- if (CurPos == 0) {
- // FIXME: We have no reasonable way of handling errors in here.
- AP.OutStreamer.AddComment("nop (could not find a dwarf register number)");
- AP.EmitInt8(dwarf::DW_OP_nop);
- }
+void AsmPrinter::EmitDwarfOpPiece(ByteStreamer &Streamer,
+ unsigned PieceSizeInBits,
+ unsigned PieceOffsetInBits) const {
+ DebugLocDwarfExpression Expr(TM, Streamer);
+ Expr.AddOpPiece(PieceSizeInBits, PieceOffsetInBits);
}
/// EmitDwarfRegOp - Emit dwarf register operation.
-void AsmPrinter::EmitDwarfRegOp(const MachineLocation &MLoc,
+void AsmPrinter::EmitDwarfRegOp(ByteStreamer &Streamer,
+ const MachineLocation &MLoc,
bool Indirect) const {
- const TargetRegisterInfo *TRI = TM.getRegisterInfo();
+ DebugLocDwarfExpression Expr(TM, Streamer);
+ const TargetRegisterInfo *TRI = TM.getSubtargetImpl()->getRegisterInfo();
int Reg = TRI->getDwarfRegNum(MLoc.getReg(), false);
if (Reg < 0) {
// We assume that pointers are always in an addressable register.
- if (Indirect || MLoc.isIndirect()) {
+ if (Indirect || MLoc.isIndirect())
// FIXME: We have no reasonable way of handling errors in here. The
// caller might be in the middle of a dwarf expression. We should
// probably assert that Reg >= 0 once debug info generation is more
// mature.
- OutStreamer.AddComment(
- "nop (invalid dwarf register number for indirect loc)");
- EmitInt8(dwarf::DW_OP_nop);
- return;
- }
+ return Expr.EmitOp(dwarf::DW_OP_nop,
+ "nop (could not find a dwarf register number)");
// Attempt to find a valid super- or sub-register.
- if (!Indirect && !MLoc.isIndirect())
- return EmitDwarfRegOpPiece(*this, MLoc);
+ return Expr.AddMachineRegPiece(MLoc.getReg());
}
if (MLoc.isIndirect())
- emitDwarfRegOpIndirect(*this, Reg, MLoc.getOffset(), Indirect);
+ Expr.AddRegIndirect(Reg, MLoc.getOffset(), Indirect);
else if (Indirect)
- emitDwarfRegOpIndirect(*this, Reg, 0, false);
+ Expr.AddRegIndirect(Reg, 0, false);
else
- emitDwarfRegOp(*this, Reg);
+ Expr.AddReg(Reg);
}
//===----------------------------------------------------------------------===//
case MCCFIInstruction::OpWindowSave:
OutStreamer.EmitCFIWindowSave();
break;
+ case MCCFIInstruction::OpSameValue:
+ OutStreamer.EmitCFISameValue(Inst.getRegister());
+ break;
}
}
projects / oota-llvm.git / blobdiff