#ifndef LLVM_TARGET_TARGETMACHINE_H
#define LLVM_TARGET_TARGETMACHINE_H
-#include "llvm/Target/TargetInstrItineraries.h"
+#include "llvm/MC/MCCodeGenInfo.h"
+#include "llvm/ADT/StringRef.h"
#include <cassert>
+#include <string>
namespace llvm {
-class TargetAsmInfo;
+class InstrItineraryData;
+class JITCodeEmitter;
+class MCAsmInfo;
+class MCCodeGenInfo;
+class MCContext;
+class Pass;
+class PassManager;
+class PassManagerBase;
+class Target;
class TargetData;
-class TargetSubtarget;
+class TargetELFWriterInfo;
+class TargetFrameLowering;
class TargetInstrInfo;
class TargetIntrinsicInfo;
class TargetJITInfo;
class TargetLowering;
-class TargetFrameInfo;
-class MachineCodeEmitter;
class TargetRegisterInfo;
-class Module;
-class PassManagerBase;
-class PassManager;
-class Pass;
-class TargetMachOWriterInfo;
-class TargetELFWriterInfo;
+class TargetSelectionDAGInfo;
+class TargetSubtargetInfo;
+class formatted_raw_ostream;
class raw_ostream;
-// Relocation model types.
-namespace Reloc {
- enum Model {
- Default,
- Static,
- PIC_, // Cannot be named PIC due to collision with -DPIC
- DynamicNoPIC
- };
-}
-
-// Code model types.
-namespace CodeModel {
- enum Model {
- Default,
- Small,
- Kernel,
- Medium,
- Large
- };
-}
-
-namespace FileModel {
- enum Model {
- Error,
- None,
- AsmFile,
- MachOFile,
- ElfFile
- };
-}
-
// Code generation optimization level.
namespace CodeGenOpt {
enum Level {
- Default,
- None,
- One,
- Two,
- Size,
- Aggressive,
- LTO
+ None, // -O0
+ Less, // -O1
+ Default, // -O2, -Os
+ Aggressive // -O3
+ };
+}
+
+namespace Sched {
+ enum Preference {
+ None, // No preference
+ Latency, // Scheduling for shortest total latency.
+ RegPressure, // Scheduling for lowest register pressure.
+ Hybrid, // Scheduling for both latency and register pressure.
+ ILP // Scheduling for ILP in low register pressure mode.
};
}
TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
void operator=(const TargetMachine &); // DO NOT IMPLEMENT
protected: // Can only create subclasses.
- TargetMachine() : AsmInfo(0) { }
+ TargetMachine(const Target &T, StringRef TargetTriple,
+ StringRef CPU, StringRef FS);
/// getSubtargetImpl - virtual method implemented by subclasses that returns
- /// a reference to that target's TargetSubtarget-derived member variable.
- virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
-
+ /// a reference to that target's TargetSubtargetInfo-derived member variable.
+ virtual const TargetSubtargetInfo *getSubtargetImpl() const { return 0; }
+
+ /// TheTarget - The Target that this machine was created for.
+ const Target &TheTarget;
+
+ /// TargetTriple, TargetCPU, TargetFS - Triple string, CPU name, and target
+ /// feature strings the TargetMachine instance is created with.
+ std::string TargetTriple;
+ std::string TargetCPU;
+ std::string TargetFS;
+
+ /// CodeGenInfo - Low level target information such as relocation model.
+ const MCCodeGenInfo *CodeGenInfo;
+
/// AsmInfo - Contains target specific asm information.
///
- mutable const TargetAsmInfo *AsmInfo;
-
- /// createTargetAsmInfo - Create a new instance of target specific asm
- /// information.
- virtual const TargetAsmInfo *createTargetAsmInfo() const { return 0; }
+ const MCAsmInfo *AsmInfo;
+
+ unsigned MCRelaxAll : 1;
+ unsigned MCNoExecStack : 1;
+ unsigned MCSaveTempLabels : 1;
+ unsigned MCUseLoc : 1;
+ unsigned MCUseCFI : 1;
public:
virtual ~TargetMachine();
- /// getModuleMatchQuality - This static method should be implemented by
- /// targets to indicate how closely they match the specified module. This is
- /// used by the LLC tool to determine which target to use when an explicit
- /// -march option is not specified. If a target returns zero, it will never
- /// be chosen without an explicit -march option.
- static unsigned getModuleMatchQuality(const Module &) { return 0; }
+ const Target &getTarget() const { return TheTarget; }
- /// getJITMatchQuality - This static method should be implemented by targets
- /// that provide JIT capabilities to indicate how suitable they are for
- /// execution on the current host. If a value of 0 is returned, the target
- /// will not be used unless an explicit -march option is used.
- static unsigned getJITMatchQuality() { return 0; }
+ const StringRef getTargetTriple() const { return TargetTriple; }
+ const StringRef getTargetCPU() const { return TargetCPU; }
+ const StringRef getTargetFeatureString() const { return TargetFS; }
// Interfaces to the major aspects of target machine information:
// -- Instruction opcode and operand information
// -- Stack frame information
// -- Selection DAG lowering information
//
- virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
- virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
- virtual TargetLowering *getTargetLowering() const { return 0; }
- virtual const TargetData *getTargetData() const { return 0; }
-
- /// getTargetAsmInfo - Return target specific asm information.
+ virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
+ virtual const TargetFrameLowering *getFrameLowering() const { return 0; }
+ virtual const TargetLowering *getTargetLowering() const { return 0; }
+ virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const{ return 0; }
+ virtual const TargetData *getTargetData() const { return 0; }
+
+ /// getMCAsmInfo - Return target specific asm information.
///
- const TargetAsmInfo *getTargetAsmInfo() const {
- if (!AsmInfo) AsmInfo = createTargetAsmInfo();
- return AsmInfo;
- }
-
+ const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
+
/// getSubtarget - This method returns a pointer to the specified type of
- /// TargetSubtarget. In debug builds, it verifies that the object being
+ /// TargetSubtargetInfo. In debug builds, it verifies that the object being
/// returned is of the correct type.
template<typename STC> const STC &getSubtarget() const {
- const TargetSubtarget *TST = getSubtargetImpl();
- assert(TST && dynamic_cast<const STC*>(TST) &&
- "Not the right kind of subtarget!");
- return *static_cast<const STC*>(TST);
+ return *static_cast<const STC*>(getSubtargetImpl());
}
/// getRegisterInfo - If register information is available, return it. If
/// details of graph coloring register allocation removed from it.
///
virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
-
+
/// getIntrinsicInfo - If intrinsic information is available, return it. If
/// not, return null.
///
/// otherwise return null.
///
virtual TargetJITInfo *getJITInfo() { return 0; }
-
+
/// getInstrItineraryData - Returns instruction itinerary data for the target
/// or specific subtarget.
///
- virtual const InstrItineraryData getInstrItineraryData() const {
- return InstrItineraryData();
+ virtual const InstrItineraryData *getInstrItineraryData() const {
+ return 0;
}
- /// getMachOWriterInfo - If this target supports a Mach-O writer, return
- /// information for it, otherwise return null.
- ///
- virtual const TargetMachOWriterInfo *getMachOWriterInfo() const { return 0; }
-
/// getELFWriterInfo - If this target supports an ELF writer, return
/// information for it, otherwise return null.
- ///
+ ///
virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
+ /// hasMCRelaxAll - Check whether all machine code instructions should be
+ /// relaxed.
+ bool hasMCRelaxAll() const { return MCRelaxAll; }
+
+ /// setMCRelaxAll - Set whether all machine code instructions should be
+ /// relaxed.
+ void setMCRelaxAll(bool Value) { MCRelaxAll = Value; }
+
+ /// hasMCSaveTempLabels - Check whether temporary labels will be preserved
+ /// (i.e., not treated as temporary).
+ bool hasMCSaveTempLabels() const { return MCSaveTempLabels; }
+
+ /// setMCSaveTempLabels - Set whether temporary labels will be preserved
+ /// (i.e., not treated as temporary).
+ void setMCSaveTempLabels(bool Value) { MCSaveTempLabels = Value; }
+
+ /// hasMCNoExecStack - Check whether an executable stack is not needed.
+ bool hasMCNoExecStack() const { return MCNoExecStack; }
+
+ /// setMCNoExecStack - Set whether an executabel stack is not needed.
+ void setMCNoExecStack(bool Value) { MCNoExecStack = Value; }
+
+ /// hasMCUseLoc - Check whether we should use dwarf's .loc directive.
+ bool hasMCUseLoc() const { return MCUseLoc; }
+
+ /// setMCUseLoc - Set whether all we should use dwarf's .loc directive.
+ void setMCUseLoc(bool Value) { MCUseLoc = Value; }
+
+ /// hasMCUseCFI - Check whether we should use dwarf's .cfi_* directives.
+ bool hasMCUseCFI() const { return MCUseCFI; }
+
+ /// setMCUseCFI - Set whether all we should use dwarf's .cfi_* directives.
+ void setMCUseCFI(bool Value) { MCUseCFI = Value; }
+
/// getRelocationModel - Returns the code generation relocation model. The
/// choices are static, PIC, and dynamic-no-pic, and target default.
- static Reloc::Model getRelocationModel();
-
- /// setRelocationModel - Sets the code generation relocation model.
- ///
- static void setRelocationModel(Reloc::Model Model);
+ Reloc::Model getRelocationModel() const;
/// getCodeModel - Returns the code model. The choices are small, kernel,
/// medium, large, and target default.
- static CodeModel::Model getCodeModel();
-
- /// setCodeModel - Sets the code model.
- ///
- static void setCodeModel(CodeModel::Model Model);
+ CodeModel::Model getCodeModel() const;
/// getAsmVerbosityDefault - Returns the default value of asm verbosity.
///
/// is false.
static void setAsmVerbosityDefault(bool);
+ /// getDataSections - Return true if data objects should be emitted into their
+ /// own section, corresponds to -fdata-sections.
+ static bool getDataSections();
+
+ /// getFunctionSections - Return true if functions should be emitted into
+ /// their own section, corresponding to -ffunction-sections.
+ static bool getFunctionSections();
+
+ /// setDataSections - Set if the data are emit into separate sections.
+ static void setDataSections(bool);
+
+ /// setFunctionSections - Set if the functions are emit into separate
+ /// sections.
+ static void setFunctionSections(bool);
+
/// CodeGenFileType - These enums are meant to be passed into
- /// addPassesToEmitFile to indicate what type of file to emit.
+ /// addPassesToEmitFile to indicate what type of file to emit, and returned by
+ /// it to indicate what type of file could actually be made.
enum CodeGenFileType {
- AssemblyFile, ObjectFile, DynamicLibrary
+ CGFT_AssemblyFile,
+ CGFT_ObjectFile,
+ CGFT_Null // Do not emit any output.
};
/// getEnableTailMergeDefault - the default setting for -enable-tail-merge
/// addPassesToEmitFile - Add passes to the specified pass manager to get the
/// specified file emitted. Typically this will involve several steps of code
- /// generation. If Fast is set to true, the code generator should emit code
- /// as fast as possible, though the generated code may be less efficient.
- /// This method should return FileModel::Error if emission of this file type
- /// is not supported.
- ///
- virtual FileModel::Model addPassesToEmitFile(PassManagerBase &,
- raw_ostream &,
- CodeGenFileType,
- CodeGenOpt::Level) {
- return FileModel::None;
- }
-
- /// addPassesToEmitFileFinish - If the passes to emit the specified file had
- /// to be split up (e.g., to add an object writer pass), this method can be
- /// used to finish up adding passes to emit the file, if necessary.
- ///
- virtual bool addPassesToEmitFileFinish(PassManagerBase &,
- MachineCodeEmitter *,
- CodeGenOpt::Level) {
+ /// generation. This method should return true if emission of this file type
+ /// is not supported, or false on success.
+ virtual bool addPassesToEmitFile(PassManagerBase &,
+ formatted_raw_ostream &,
+ CodeGenFileType,
+ CodeGenOpt::Level,
+ bool = true) {
return true;
}
-
+
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
- /// get machine code emitted. This uses a MachineCodeEmitter object to handle
+ /// get machine code emitted. This uses a JITCodeEmitter object to handle
/// actually outputting the machine code and resolving things like the address
/// of functions. This method returns true if machine code emission is
/// not supported.
///
virtual bool addPassesToEmitMachineCode(PassManagerBase &,
- MachineCodeEmitter &,
- CodeGenOpt::Level) {
+ JITCodeEmitter &,
+ CodeGenOpt::Level,
+ bool = true) {
return true;
}
- /// addPassesToEmitWholeFile - This method can be implemented by targets that
- /// require having the entire module at once. This is not recommended, do not
- /// use this.
- virtual bool WantsWholeFile() const { return false; }
- virtual bool addPassesToEmitWholeFile(PassManager &, raw_ostream &,
- CodeGenFileType,
- CodeGenOpt::Level) {
+ /// addPassesToEmitMC - Add passes to the specified pass manager to get
+ /// machine code emitted with the MCJIT. This method returns true if machine
+ /// code is not supported. It fills the MCContext Ctx pointer which can be
+ /// used to build custom MCStreamer.
+ ///
+ virtual bool addPassesToEmitMC(PassManagerBase &,
+ MCContext *&,
+ raw_ostream &,
+ CodeGenOpt::Level,
+ bool = true) {
return true;
}
};
///
class LLVMTargetMachine : public TargetMachine {
protected: // Can only create subclasses.
- LLVMTargetMachine() { }
+ LLVMTargetMachine(const Target &T, StringRef TargetTriple,
+ StringRef CPU, StringRef FS,
+ Reloc::Model RM, CodeModel::Model CM);
+private:
/// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
/// both emitting to assembly files or machine code output.
///
- bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level);
+ bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level,
+ bool DisableVerify, MCContext *&OutCtx);
public:
-
/// addPassesToEmitFile - Add passes to the specified pass manager to get the
/// specified file emitted. Typically this will involve several steps of code
- /// generation. If OptLevel is None, the code generator should emit code as fast
- /// as possible, though the generated code may be less efficient. This method
- /// should return FileModel::Error if emission of this file type is not
- /// supported.
- ///
- /// The default implementation of this method adds components from the
- /// LLVM retargetable code generator, invoking the methods below to get
- /// target-specific passes in standard locations.
- ///
- virtual FileModel::Model addPassesToEmitFile(PassManagerBase &PM,
- raw_ostream &Out,
- CodeGenFileType FileType,
- CodeGenOpt::Level);
-
- /// addPassesToEmitFileFinish - If the passes to emit the specified file had
- /// to be split up (e.g., to add an object writer pass), this method can be
- /// used to finish up adding passes to emit the file, if necessary.
- ///
- virtual bool addPassesToEmitFileFinish(PassManagerBase &PM,
- MachineCodeEmitter *MCE,
- CodeGenOpt::Level);
-
+ /// generation. If OptLevel is None, the code generator should emit code as
+ /// fast as possible, though the generated code may be less efficient.
+ virtual bool addPassesToEmitFile(PassManagerBase &PM,
+ formatted_raw_ostream &Out,
+ CodeGenFileType FileType,
+ CodeGenOpt::Level,
+ bool DisableVerify = true);
+
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
- /// get machine code emitted. This uses a MachineCodeEmitter object to handle
+ /// get machine code emitted. This uses a JITCodeEmitter object to handle
/// actually outputting the machine code and resolving things like the address
/// of functions. This method returns true if machine code emission is
/// not supported.
///
virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
- MachineCodeEmitter &MCE,
- CodeGenOpt::Level);
-
+ JITCodeEmitter &MCE,
+ CodeGenOpt::Level,
+ bool DisableVerify = true);
+
+ /// addPassesToEmitMC - Add passes to the specified pass manager to get
+ /// machine code emitted with the MCJIT. This method returns true if machine
+ /// code is not supported. It fills the MCContext Ctx pointer which can be
+ /// used to build custom MCStreamer.
+ ///
+ virtual bool addPassesToEmitMC(PassManagerBase &PM,
+ MCContext *&Ctx,
+ raw_ostream &OS,
+ CodeGenOpt::Level OptLevel,
+ bool DisableVerify = true);
+
/// Target-Independent Code Generator Pass Configuration Options.
-
- /// addInstSelector - This method should add any "last minute" LLVM->LLVM
- /// passes, then install an instruction selector pass, which converts from
- /// LLVM code to machine instructions.
+
+ /// addPreISelPasses - This method should add any "last minute" LLVM->LLVM
+ /// passes (which are run just before instruction selector).
+ virtual bool addPreISel(PassManagerBase &, CodeGenOpt::Level) {
+ return true;
+ }
+
+ /// addInstSelector - This method should install an instruction selector pass,
+ /// which converts from LLVM code to machine instructions.
virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) {
return true;
}
- /// addPreRegAllocPasses - This method may be implemented by targets that want
- /// to run passes immediately before register allocation. This should return
+ /// addPreRegAlloc - This method may be implemented by targets that want to
+ /// run passes immediately before register allocation. This should return
/// true if -print-machineinstrs should print after these passes.
virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
return false;
}
- /// addPostRegAllocPasses - This method may be implemented by targets that
- /// want to run passes after register allocation but before prolog-epilog
+ /// addPostRegAlloc - This method may be implemented by targets that want
+ /// to run passes after register allocation but before prolog-epilog
/// insertion. This should return true if -print-machineinstrs should print
/// after these passes.
virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
return false;
}
-
+
+ /// addPreSched2 - This method may be implemented by targets that want to
+ /// run passes after prolog-epilog insertion and before the second instruction
+ /// scheduling pass. This should return true if -print-machineinstrs should
+ /// print after these passes.
+ virtual bool addPreSched2(PassManagerBase &, CodeGenOpt::Level) {
+ return false;
+ }
+
/// addPreEmitPass - This pass may be implemented by targets that want to run
/// passes immediately before machine code is emitted. This should return
/// true if -print-machineinstrs should print out the code after the passes.
virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) {
return false;
}
-
-
- /// addAssemblyEmitter - This pass should be overridden by the target to add
- /// the asmprinter, if asm emission is supported. If this is not supported,
- /// 'true' should be returned.
- virtual bool addAssemblyEmitter(PassManagerBase &, CodeGenOpt::Level,
- bool /* VerboseAsmDefault */, raw_ostream &) {
- return true;
- }
-
+
+
/// addCodeEmitter - This pass should be overridden by the target to add a
/// code emitter, if supported. If this is not supported, 'true' should be
- /// returned. If DumpAsm is true, the generated assembly is printed to cerr.
+ /// returned.
virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
- bool /*DumpAsm*/, MachineCodeEmitter &) {
- return true;
- }
-
- /// addSimpleCodeEmitter - This pass should be overridden by the target to add
- /// a code emitter (without setting flags), if supported. If this is not
- /// supported, 'true' should be returned. If DumpAsm is true, the generated
- /// assembly is printed to cerr.
- virtual bool addSimpleCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
- bool /*DumpAsm*/, MachineCodeEmitter &) {
+ JITCodeEmitter &) {
return true;
}