/// getRegClassFor - Return the register class that should be used for the
/// specified value type. This may only be called on legal types.
TargetRegisterClass *getRegClassFor(MVT::ValueType VT) const {
+ assert(!MVT::isExtendedVT(VT));
TargetRegisterClass *RC = RegClassForVT[VT];
assert(RC && "This value type is not natively supported!");
return RC;
/// specified value type. This means that it has a register that directly
/// holds it without promotions or expansions.
bool isTypeLegal(MVT::ValueType VT) const {
- return RegClassForVT[VT] != 0;
+ return !MVT::isExtendedVT(VT) && RegClassForVT[VT] != 0;
}
class ValueTypeActionImpl {
}
LegalizeAction getTypeAction(MVT::ValueType VT) const {
+ if (MVT::isExtendedVT(VT)) return Expand;
return (LegalizeAction)((ValueTypeActions[VT>>4] >> ((2*VT) & 31)) & 3);
}
void setTypeAction(MVT::ValueType VT, LegalizeAction Action) {
+ assert(!MVT::isExtendedVT(VT));
assert(unsigned(VT >> 4) <
sizeof(ValueTypeActions)/sizeof(ValueTypeActions[0]));
ValueTypeActions[VT>>4] |= Action << ((VT*2) & 31);
/// to get to the smaller register. For illegal floating point types, this
/// returns the integer type to transform to.
MVT::ValueType getTypeToTransformTo(MVT::ValueType VT) const {
+ if (MVT::isExtendedVT(VT))
+ return MVT::getVectorType(MVT::getVectorElementType(VT),
+ MVT::getVectorNumElements(VT) / 2);
+
return TransformToType[VT];
}
/// that are larger than the largest integer register or illegal floating
/// point types), this returns the largest legal type it will be expanded to.
MVT::ValueType getTypeToExpandTo(MVT::ValueType VT) const {
+ assert(!MVT::isExtendedVT(VT));
while (true) {
switch (getTypeAction(VT)) {
case Legal:
return VT;
case Expand:
- VT = TransformToType[VT];
+ VT = getTypeToTransformTo(VT);
break;
default:
assert(false && "Type is not legal nor is it to be expanded!");
}
/// getVectorTypeBreakdown - Vector types are broken down into some number of
- /// legal first class types. For example, <8 x float> maps to 2 MVT::v4f32
+ /// legal first class types. For example, MVT::v8f32 maps to 2 MVT::v4f32
/// with Altivec or SSE1, or 8 promoted MVT::f64 values with the X86 FP stack.
- /// Similarly, <2 x long> turns into 4 MVT::i32 values with both PPC and X86.
+ /// Similarly, MVT::v2i64 turns into 4 MVT::i32 values with both PPC and X86.
///
/// This method returns the number of registers needed, and the VT for each
/// register. It also returns the VT of the VectorType elements before they
/// are promoted/expanded.
///
- unsigned getVectorTypeBreakdown(const VectorType *PTy,
- MVT::ValueType &PTyElementVT,
- MVT::ValueType &PTyLegalElementVT) const;
+ unsigned getVectorTypeBreakdown(MVT::ValueType VT,
+ MVT::ValueType &ElementVT,
+ MVT::ValueType &LegalElementVT) const;
typedef std::vector<double>::const_iterator legal_fpimm_iterator;
legal_fpimm_iterator legal_fpimm_begin() const {
/// expanded to some other code sequence, or the target has a custom expander
/// for it.
LegalizeAction getOperationAction(unsigned Op, MVT::ValueType VT) const {
+ if (MVT::isExtendedVT(VT)) return Expand;
return (LegalizeAction)((OpActions[Op] >> (2*VT)) & 3);
}
/// expanded to some other code sequence, or the target has a custom expander
/// for it.
LegalizeAction getLoadXAction(unsigned LType, MVT::ValueType VT) const {
+ if (MVT::isExtendedVT(VT)) return Expand;
return (LegalizeAction)((LoadXActions[LType] >> (2*VT)) & 3);
}
/// expanded to some other code sequence, or the target has a custom expander
/// for it.
LegalizeAction getStoreXAction(MVT::ValueType VT) const {
+ if (MVT::isExtendedVT(VT)) return Expand;
return (LegalizeAction)((StoreXActions >> (2*VT)) & 3);
}
/// for it.
LegalizeAction
getIndexedLoadAction(unsigned IdxMode, MVT::ValueType VT) const {
+ if (MVT::isExtendedVT(VT)) return Expand;
return (LegalizeAction)((IndexedModeActions[0][IdxMode] >> (2*VT)) & 3);
}
/// for it.
LegalizeAction
getIndexedStoreAction(unsigned IdxMode, MVT::ValueType VT) const {
+ if (MVT::isExtendedVT(VT)) return Expand;
return (LegalizeAction)((IndexedModeActions[1][IdxMode] >> (2*VT)) & 3);
}
}
/// getValueType - Return the MVT::ValueType corresponding to this LLVM type.
- /// This is fixed by the LLVM operations except for the pointer size.
- MVT::ValueType getValueType(const Type *Ty) const;
+ /// This is fixed by the LLVM operations except for the pointer size. If
+ /// AllowUnknown is true, this will return MVT::Other for types with no MVT
+ /// counterpart (e.g. structs), otherwise it will assert.
+ MVT::ValueType getValueType(const Type *Ty, bool AllowUnknown = false) const {
+ MVT::ValueType VT = MVT::getValueType(Ty, AllowUnknown);
+ return VT == MVT::iPTR ? PointerTy : VT;
+ }
- /// getNumElements - Return the number of registers that this ValueType will
+ /// getNumRegisters - Return the number of registers that this ValueType will
/// eventually require. This is one for any types promoted to live in larger
/// registers, but may be more than one for types (like i64) that are split
/// into pieces.
- unsigned getNumElements(MVT::ValueType VT) const {
- return NumElementsForVT[VT];
+ unsigned getNumRegisters(MVT::ValueType VT) const {
+ if (!MVT::isExtendedVT(VT))
+ return NumRegistersForVT[VT];
+
+ MVT::ValueType VT1, VT2;
+ return getVectorTypeBreakdown(VT, VT1, VT2);
}
/// hasTargetDAGCombine - If true, the target has custom DAG combine
return JumpBufAlignment;
}
+ /// getIfCvtBlockLimit - returns the target specific if-conversion block size
+ /// limit. Any block whose size is greater should not be predicated.
+ virtual unsigned getIfCvtBlockSizeLimit() const {
+ return IfCvtBlockSizeLimit;
+ }
+
+ /// getIfCvtDupBlockLimit - returns the target specific size limit for a
+ /// block to be considered for duplication. Any block whose size is greater
+ /// should not be duplicated to facilitate its predication.
+ virtual unsigned getIfCvtDupBlockSizeLimit() const {
+ return IfCvtDupBlockSizeLimit;
+ }
+
/// getPreIndexedAddressParts - returns true by value, base pointer and
/// offset pointer and addressing mode by reference if the node's address
/// can be legally represented as pre-indexed load / store address.
bool ShrinkDemandedConstant(SDOperand Op, uint64_t Demanded);
};
- /// MaskedValueIsZero - Return true if 'Op & Mask' is known to be zero. We
- /// use this predicate to simplify operations downstream. Op and Mask are
- /// known to be the same type.
- bool MaskedValueIsZero(SDOperand Op, uint64_t Mask, unsigned Depth = 0)
- const;
-
- /// ComputeMaskedBits - Determine which of the bits specified in Mask are
- /// known to be either zero or one and return them in the KnownZero/KnownOne
- /// bitsets. This code only analyzes bits in Mask, in order to short-circuit
- /// processing. Targets can implement the computeMaskedBitsForTargetNode
- /// method, to allow target nodes to be understood.
- void ComputeMaskedBits(SDOperand Op, uint64_t Mask, uint64_t &KnownZero,
- uint64_t &KnownOne, unsigned Depth = 0) const;
-
/// SimplifyDemandedBits - Look at Op. At this point, we know that only the
/// DemandedMask bits of the result of Op are ever used downstream. If we can
/// use this information to simplify Op, create a new simplified DAG node and
uint64_t Mask,
uint64_t &KnownZero,
uint64_t &KnownOne,
+ const SelectionDAG &DAG,
unsigned Depth = 0) const;
- /// ComputeNumSignBits - Return the number of times the sign bit of the
- /// register is replicated into the other bits. We know that at least 1 bit
- /// is always equal to the sign bit (itself), but other cases can give us
- /// information. For example, immediately after an "SRA X, 2", we know that
- /// the top 3 bits are all equal to each other, so we return 3.
- unsigned ComputeNumSignBits(SDOperand Op, unsigned Depth = 0) const;
-
/// ComputeNumSignBitsForTargetNode - This method can be implemented by
/// targets that want to expose additional information about sign bits to the
/// DAG Combiner.
/// regclass for the specified value type. This indicates the selector can
/// handle values of that class natively.
void addRegisterClass(MVT::ValueType VT, TargetRegisterClass *RC) {
+ assert(!MVT::isExtendedVT(VT));
AvailableRegClasses.push_back(std::make_pair(VT, RC));
RegClassForVT[VT] = RC;
}
void setJumpBufAlignment(unsigned Align) {
JumpBufAlignment = Align;
}
+
+ /// setIfCvtBlockSizeLimit - Set the target's if-conversion block size
+ /// limit (in number of instructions); default is 2.
+ void setIfCvtBlockSizeLimit(unsigned Limit) {
+ IfCvtBlockSizeLimit = Limit;
+ }
+
+ /// setIfCvtDupBlockSizeLimit - Set the target's block size limit (in number
+ /// of instructions) to be considered for code duplication during
+ /// if-conversion; default is 2.
+ void setIfCvtDupBlockSizeLimit(unsigned Limit) {
+ IfCvtDupBlockSizeLimit = Limit;
+ }
public:
C_Unknown // Unsupported constraint.
};
- /// getConstraintType - Given a constraint letter, return the type of
- /// constraint it is for this target.
- virtual ConstraintType getConstraintType(char ConstraintLetter) const;
+ /// getConstraintType - Given a constraint, return the type of constraint it
+ /// is for this target.
+ virtual ConstraintType getConstraintType(const std::string &Constraint) const;
/// getRegClassForInlineAsmConstraint - Given a constraint letter (e.g. "r"),
MachineBasicBlock *MBB);
//===--------------------------------------------------------------------===//
- // Loop Strength Reduction hooks
+ // Addressing mode description hooks (used by LSR etc).
//
-
- /// isLegalAddressImmediate - Return true if the integer value can be used as
- /// the offset of the target addressing mode for load / store of the given
- /// type.
- virtual bool isLegalAddressImmediate(int64_t V, const Type *Ty) const;
-
- /// isLegalAddressImmediate - Return true if the GlobalValue can be used as
- /// the offset of the target addressing mode.
- virtual bool isLegalAddressImmediate(GlobalValue *GV) const;
- /// isLegalAddressScale - Return true if the integer value can be used as the
- /// scale of the target addressing mode for load / store of the given type.
- virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
+ /// AddrMode - This represents an addressing mode of:
+ /// BaseGV + BaseOffs + BaseReg + Scale*ScaleReg
+ /// If BaseGV is null, there is no BaseGV.
+ /// If BaseOffs is zero, there is no base offset.
+ /// If HasBaseReg is false, there is no base register.
+ /// If Scale is zero, there is no ScaleReg. Scale of 1 indicates a reg with
+ /// no scale.
+ ///
+ struct AddrMode {
+ GlobalValue *BaseGV;
+ int64_t BaseOffs;
+ bool HasBaseReg;
+ int64_t Scale;
+ AddrMode() : BaseGV(0), BaseOffs(0), HasBaseReg(false), Scale(0) {}
+ };
+
+ /// isLegalAddressingMode - Return true if the addressing mode represented by
+ /// AM is legal for this target, for a load/store of the specified type.
+ /// TODO: Handle pre/postinc as well.
+ virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty) const;
//===--------------------------------------------------------------------===//
// Div utility functions
//
SDOperand BuildSDIV(SDNode *N, SelectionDAG &DAG,
- std::vector<SDNode*>* Created) const;
+ std::vector<SDNode*>* Created) const;
SDOperand BuildUDIV(SDNode *N, SelectionDAG &DAG,
- std::vector<SDNode*>* Created) const;
+ std::vector<SDNode*>* Created) const;
//===--------------------------------------------------------------------===//
/// JumpBufAlignment - The alignment, in bytes, of the target's jmp_buf
/// buffers
unsigned JumpBufAlignment;
+
+ /// IfCvtBlockSizeLimit - The maximum allowed size for a block to be
+ /// if-converted.
+ unsigned IfCvtBlockSizeLimit;
+ /// IfCvtDupBlockSizeLimit - The maximum allowed size for a block to be
+ /// duplicated during if-conversion.
+ unsigned IfCvtDupBlockSizeLimit;
+
/// StackPointerRegisterToSaveRestore - If set to a physical register, this
/// specifies the register that llvm.savestack/llvm.restorestack should save
/// and restore.
/// RegClassForVT - This indicates the default register class to use for
/// each ValueType the target supports natively.
TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE];
- unsigned char NumElementsForVT[MVT::LAST_VALUETYPE];
+ unsigned char NumRegistersForVT[MVT::LAST_VALUETYPE];
/// TransformToType - For any value types we are promoting or expanding, this
/// contains the value type that we are changing to. For Expanded types, this
projects / oota-llvm.git / blobdiff