Changes For Bug 352

[oota-llvm.git] / include / llvm / Target / TargetInstrInfo.h

diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h
index 4fa1f4c346ce7a042b763c545fe0d18f65c8b6d6..d5f4b94d967a0e8a1e99e98a72e261977d85c057 100644 (file)
--- a/include/llvm/Target/TargetInstrInfo.h
+++ b/include/llvm/Target/TargetInstrInfo.h
@@ -15,7 +15,7 @@
 #define LLVM_TARGET_TARGETINSTRINFO_H
 
 #include "llvm/CodeGen/MachineBasicBlock.h"
-#include "Support/DataTypes.h"
+#include "llvm/Support/DataTypes.h"
 #include <vector>
 #include <cassert>
 
@@ -51,8 +51,6 @@ const unsigned M_BARRIER_FLAG           = 1 << 4;
 const unsigned M_CC_FLAG               = 1 << 6;
 const unsigned M_LOAD_FLAG             = 1 << 10;
 const unsigned M_STORE_FLAG            = 1 << 12;
-const unsigned M_DUMMY_PHI_FLAG        = 1 << 13;
-const unsigned M_PSEUDO_FLAG           = 1 << 14;       // Pseudo instruction
 // 3-addr instructions which really work like 2-addr ones, eg. X86 add/sub
 const unsigned M_2_ADDR_FLAG           = 1 << 15;
 
@@ -137,9 +135,6 @@ public:
     return get(Opcode).Flags & M_RET_FLAG;
   }
 
-  bool isPseudoInstr(MachineOpCode Opcode) const {
-    return get(Opcode).Flags & M_PSEUDO_FLAG;
-  }
   bool isTwoAddrInstr(MachineOpCode Opcode) const {
     return get(Opcode).Flags & M_2_ADDR_FLAG;
   }
@@ -180,9 +175,6 @@ public:
   //
   //-------------------------------------------------------------------------
 
-  int getResultPos(MachineOpCode Opcode) const {
-    return get(Opcode).resultPos;
-  }
   unsigned getNumDelaySlots(MachineOpCode Opcode) const {
     return get(Opcode).numDelaySlots;
   }
@@ -210,10 +202,6 @@ public:
   bool isStore(MachineOpCode Opcode) const {
     return get(Opcode).Flags & M_STORE_FLAG;
   }
-  bool isDummyPhiInstr(MachineOpCode Opcode) const {
-    return get(Opcode).Flags & M_DUMMY_PHI_FLAG;
-  }
-
   virtual bool hasResultInterlock(MachineOpCode Opcode) const {
     return true;
   }