namespace llvm {
+/// An unsigned integer type large enough to represent all physical registers,
+/// but not necessarily virtual registers.
+typedef uint16_t MCPhysReg;
+
/// MCRegisterClass - Base class of TargetRegisterClass.
class MCRegisterClass {
public:
- typedef const uint16_t* iterator;
- typedef const uint16_t* const_iterator;
+ typedef const MCPhysReg* iterator;
+ typedef const MCPhysReg* const_iterator;
const char *Name;
const iterator RegsBegin;
uint32_t SubRegs; // Sub-register set, described above
uint32_t SuperRegs; // Super-register set, described above
+ // Offset into MCRI::SubRegIndices of a list of sub-register indices for each
+ // sub-register in SubRegs.
+ uint32_t SubRegIndices;
+
// RegUnits - Points to the list of register units. The low 4 bits holds the
// Scale, the high bits hold an offset into DiffLists. See MCRegUnitIterator.
uint32_t RegUnits;
unsigned NumClasses; // Number of entries in the array
unsigned NumRegUnits; // Number of regunits.
const uint16_t (*RegUnitRoots)[2]; // Pointer to regunit root table.
- const uint16_t *RegLists; // Pointer to the reglists array
- const uint16_t *DiffLists; // Pointer to the difflists array
+ const MCPhysReg *DiffLists; // Pointer to the difflists array
const char *RegStrings; // Pointer to the string table.
const uint16_t *SubRegIndices; // Pointer to the subreg lookup
// array.
DenseMap<unsigned, int> L2SEHRegs; // LLVM to SEH regs mapping
public:
- /// RegListIterator. This iterator class is used to traverse lists of
- /// super-registers, sub-registers, and overlapping registers. Don't use it
- /// directly, use one of the sub-classes defined below.
- class RegListIterator {
- const uint16_t *Pos;
- public:
- explicit RegListIterator(const uint16_t *Table)
- : Pos(Table) {}
-
- /// isValid - Return false when the end of the list is reached.
- bool isValid() const { return *Pos; }
-
- /// Dereference the iterator to get the current register.
- unsigned operator*() const { return *Pos; }
-
- /// Pre-increment. Move to the next register.
- void operator++() { ++Pos; }
- };
-
/// DiffListIterator - Base iterator class that can traverse the
/// differentially encoded register and regunit lists in DiffLists.
/// Don't use this class directly, use one of the specialized sub-classes
/// defined below.
class DiffListIterator {
uint16_t Val;
- const uint16_t *List;
+ const MCPhysReg *List;
protected:
/// Create an invalid iterator. Call init() to point to something useful.
/// init - Point the iterator to InitVal, decoding subsequent values from
/// DiffList. The iterator will initially point to InitVal, sub-classes are
/// responsible for skipping the seed value if it is not part of the list.
- void init(uint16_t InitVal, const uint16_t *DiffList) {
+ void init(MCPhysReg InitVal, const MCPhysReg *DiffList) {
Val = InitVal;
List = DiffList;
}
/// is the caller's responsibility (by checking for a 0 return value).
unsigned advance() {
assert(isValid() && "Cannot move off the end of the list.");
- uint16_t D = *List++;
+ MCPhysReg D = *List++;
Val += D;
return D;
}
}
};
- // These iterators are allowed to sub-class RegListIterator and
- // DiffListIterator and access internal list pointers.
+ // These iterators are allowed to sub-class DiffListIterator and access
+ // internal list pointers.
friend class MCSubRegIterator;
friend class MCSuperRegIterator;
friend class MCRegAliasIterator;
const MCRegisterClass *C, unsigned NC,
const uint16_t (*RURoots)[2],
unsigned NRU,
- const uint16_t *RL,
- const uint16_t *DL,
+ const MCPhysReg *DL,
const char *Strings,
const uint16_t *SubIndices,
unsigned NumIndices,
NumRegs = NR;
RAReg = RA;
Classes = C;
- RegLists = RL;
DiffLists = DL;
RegStrings = Strings;
NumClasses = NC;
/// getSubReg - Returns the physical register number of sub-register "Index"
/// for physical register RegNo. Return zero if the sub-register does not
/// exist.
- unsigned getSubReg(unsigned Reg, unsigned Idx) const {
- return *(SubRegIndices + (Reg - 1) * NumSubRegIndices + Idx - 1);
- }
+ unsigned getSubReg(unsigned Reg, unsigned Idx) const;
/// getMatchingSuperReg - Return a super-register of the specified register
/// Reg so its sub-register of index SubIdx is Reg.
/// getSubRegIndex - For a given register pair, return the sub-register index
/// if the second register is a sub-register of the first. Return zero
/// otherwise.
- unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const {
- for (unsigned I = 1; I <= NumSubRegIndices; ++I)
- if (getSubReg(RegNo, I) == SubRegNo)
- return I;
- return 0;
- }
+ unsigned getSubRegIndex(unsigned RegNo, unsigned SubRegNo) const;
/// getName - Return the human-readable symbolic target-specific name for the
/// specified physical register.
return NumRegs;
}
+ /// getNumSubRegIndices - Return the number of sub-register indices
+ /// understood by the target. Index 0 is reserved for the no-op sub-register,
+ /// while 1 to getNumSubRegIndices() - 1 represent real sub-registers.
+ unsigned getNumSubRegIndices() const {
+ return NumSubRegIndices;
+ }
+
/// getNumRegUnits - Return the number of (native) register units in the
/// target. Register units are numbered from 0 to getNumRegUnits() - 1. They
/// can be accessed through MCRegUnitIterator defined below.
/// number. Returns -1 if there is no equivalent value. The second
/// parameter allows targets to use different numberings for EH info and
/// debugging info.
- int getDwarfRegNum(unsigned RegNum, bool isEH) const {
- const DwarfLLVMRegPair *M = isEH ? EHL2DwarfRegs : L2DwarfRegs;
- unsigned Size = isEH ? EHL2DwarfRegsSize : L2DwarfRegsSize;
-
- DwarfLLVMRegPair Key = { RegNum, 0 };
- const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
- if (I == M+Size || I->FromReg != RegNum)
- return -1;
- return I->ToReg;
- }
+ int getDwarfRegNum(unsigned RegNum, bool isEH) const;
/// getLLVMRegNum - Map a dwarf register back to a target register.
///
- int getLLVMRegNum(unsigned RegNum, bool isEH) const {
- const DwarfLLVMRegPair *M = isEH ? EHDwarf2LRegs : Dwarf2LRegs;
- unsigned Size = isEH ? EHDwarf2LRegsSize : Dwarf2LRegsSize;
-
- DwarfLLVMRegPair Key = { RegNum, 0 };
- const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
- assert(I != M+Size && I->FromReg == RegNum && "Invalid RegNum");
- return I->ToReg;
- }
+ int getLLVMRegNum(unsigned RegNum, bool isEH) const;
/// getSEHRegNum - Map a target register to an equivalent SEH register
/// number. Returns LLVM register number if there is no equivalent value.
- int getSEHRegNum(unsigned RegNum) const {
- const DenseMap<unsigned, int>::const_iterator I = L2SEHRegs.find(RegNum);
- if (I == L2SEHRegs.end()) return (int)RegNum;
- return I->second;
- }
+ int getSEHRegNum(unsigned RegNum) const;
regclass_iterator regclass_begin() const { return Classes; }
regclass_iterator regclass_end() const { return Classes+NumClasses; }
/// getRegClass - Returns the register class associated with the enumeration
/// value. See class MCOperandInfo.
- const MCRegisterClass getRegClass(unsigned i) const {
+ const MCRegisterClass& getRegClass(unsigned i) const {
assert(i < getNumRegClasses() && "Register Class ID out of range");
return Classes[i];
}
// aliasing registers. Use these iterator classes to traverse the lists.
/// MCSubRegIterator enumerates all sub-registers of Reg.
-class MCSubRegIterator : public MCRegisterInfo::RegListIterator {
+class MCSubRegIterator : public MCRegisterInfo::DiffListIterator {
public:
- MCSubRegIterator(unsigned Reg, const MCRegisterInfo *MCRI)
- : RegListIterator(MCRI->RegLists + MCRI->get(Reg).SubRegs) {}
+ MCSubRegIterator(unsigned Reg, const MCRegisterInfo *MCRI) {
+ init(Reg, MCRI->DiffLists + MCRI->get(Reg).SubRegs);
+ ++*this;
+ }
};
/// MCSuperRegIterator enumerates all super-registers of Reg.
-class MCSuperRegIterator : public MCRegisterInfo::RegListIterator {
+class MCSuperRegIterator : public MCRegisterInfo::DiffListIterator {
public:
- MCSuperRegIterator(unsigned Reg, const MCRegisterInfo *MCRI)
- : RegListIterator(MCRI->RegLists + MCRI->get(Reg).SuperRegs) {}
+ MCSuperRegIterator(unsigned Reg, const MCRegisterInfo *MCRI) {
+ init(Reg, MCRI->DiffLists + MCRI->get(Reg).SuperRegs);
+ ++*this;
+ }
};
/// MCRegAliasIterator enumerates all registers aliasing Reg.
/// If IncludeSelf is set, Reg itself is included in the list.
-class MCRegAliasIterator : public MCRegisterInfo::RegListIterator {
+class MCRegAliasIterator : public MCRegisterInfo::DiffListIterator {
public:
- MCRegAliasIterator(unsigned Reg, const MCRegisterInfo *MCRI, bool IncludeSelf)
- : RegListIterator(MCRI->RegLists + MCRI->get(Reg).Overlaps + !IncludeSelf)
- {}
+ MCRegAliasIterator(unsigned Reg, const MCRegisterInfo *MCRI,
+ bool IncludeSelf) {
+ init(Reg, MCRI->DiffLists + MCRI->get(Reg).Overlaps);
+ // Initially, the iterator points to Reg itself.
+ if (!IncludeSelf)
+ ++*this;
+ }
};
-inline
-unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
- const MCRegisterClass *RC) const {
- for (MCSuperRegIterator Supers(Reg, this); Supers.isValid(); ++Supers)
- if (Reg == getSubReg(*Supers, SubIdx) && RC->contains(*Supers))
- return *Supers;
- return 0;
-}
-
//===----------------------------------------------------------------------===//
// Register Units
//===----------------------------------------------------------------------===//