Don't use random class variables across functions

[oota-llvm.git] / include / llvm / MC / MCInst.h

diff --git a/include/llvm/MC/MCInst.h b/include/llvm/MC/MCInst.h
index 4766815da556b014a0c3caf91d6adf823bd71480..4688b5f2b6e92e68e74ff4c74c79ed99000bbfba 100644 (file)
--- a/include/llvm/MC/MCInst.h
+++ b/include/llvm/MC/MCInst.h
@@ -28,18 +28,18 @@ class MCInstPrinter;
 class MCExpr;
 class MCInst;
 
-/// MCOperand - Instances of this class represent operands of the MCInst class.
+/// \brief Instances of this class represent operands of the MCInst class.
 /// This is a simple discriminated union.
 class MCOperand {
-  enum MachineOperandType {
-    kInvalid,                 ///< Uninitialized.
-    kRegister,                ///< Register operand.
-    kImmediate,               ///< Immediate operand.
-    kFPImmediate,             ///< Floating-point immediate operand.
-    kExpr,                    ///< Relocatable immediate operand.
-    kInst                     ///< Sub-instruction operand.
+  enum MachineOperandType : unsigned char {
+    kInvalid,     ///< Uninitialized.
+    kRegister,    ///< Register operand.
+    kImmediate,   ///< Immediate operand.
+    kFPImmediate, ///< Floating-point immediate operand.
+    kExpr,        ///< Relocatable immediate operand.
+    kInst         ///< Sub-instruction operand.
   };
-  unsigned char Kind;
+  MachineOperandType Kind;
 
   union {
     unsigned RegVal;
@@ -48,8 +48,8 @@ class MCOperand {
     const MCExpr *ExprVal;
     const MCInst *InstVal;
   };
-public:
 
+public:
   MCOperand() : Kind(kInvalid), FPImmVal(0.0) {}
 
   bool isValid() const { return Kind != kInvalid; }
@@ -59,13 +59,13 @@ public:
   bool isExpr() const { return Kind == kExpr; }
   bool isInst() const { return Kind == kInst; }
 
-  /// getReg - Returns the register number.
+  /// \brief Returns the register number.
   unsigned getReg() const {
     assert(isReg() && "This is not a register operand!");
     return RegVal;
   }
 
-  /// setReg - Set the register number.
+  /// \brief Set the register number.
   void setReg(unsigned Reg) {
     assert(isReg() && "This is not a register operand!");
     RegVal = Reg;
@@ -108,49 +108,50 @@ public:
     InstVal = Val;
   }
 
-  static MCOperand CreateReg(unsigned Reg) {
+  static MCOperand createReg(unsigned Reg) {
     MCOperand Op;
     Op.Kind = kRegister;
     Op.RegVal = Reg;
     return Op;
   }
-  static MCOperand CreateImm(int64_t Val) {
+  static MCOperand createImm(int64_t Val) {
     MCOperand Op;
     Op.Kind = kImmediate;
     Op.ImmVal = Val;
     return Op;
   }
-  static MCOperand CreateFPImm(double Val) {
+  static MCOperand createFPImm(double Val) {
     MCOperand Op;
     Op.Kind = kFPImmediate;
     Op.FPImmVal = Val;
     return Op;
   }
-  static MCOperand CreateExpr(const MCExpr *Val) {
+  static MCOperand createExpr(const MCExpr *Val) {
     MCOperand Op;
     Op.Kind = kExpr;
     Op.ExprVal = Val;
     return Op;
   }
-  static MCOperand CreateInst(const MCInst *Val) {
+  static MCOperand createInst(const MCInst *Val) {
     MCOperand Op;
     Op.Kind = kInst;
     Op.InstVal = Val;
     return Op;
   }
 
-  void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
+  void print(raw_ostream &OS) const;
   void dump() const;
 };
 
 template <> struct isPodLike<MCOperand> { static const bool value = true; };
 
-/// MCInst - Instances of this class represent a single low-level machine
+/// \brief Instances of this class represent a single low-level machine
 /// instruction.
 class MCInst {
   unsigned Opcode;
   SMLoc Loc;
   SmallVector<MCOperand, 8> Operands;
+
 public:
   MCInst() : Opcode(0) {}
 
@@ -164,38 +165,38 @@ public:
   MCOperand &getOperand(unsigned i) { return Operands[i]; }
   unsigned getNumOperands() const { return Operands.size(); }
 
-  void addOperand(const MCOperand &Op) {
-    Operands.push_back(Op);
-  }
-
-  void clear() { Operands.clear(); }
-  size_t size() { return Operands.size(); }
+  void addOperand(const MCOperand &Op) { Operands.push_back(Op); }
 
   typedef SmallVectorImpl<MCOperand>::iterator iterator;
+  typedef SmallVectorImpl<MCOperand>::const_iterator const_iterator;
+  void clear() { Operands.clear(); }
+  void erase(iterator I) { Operands.erase(I); }
+  size_t size() const { return Operands.size(); }
   iterator begin() { return Operands.begin(); }
-  iterator end()   { return Operands.end();   }
+  const_iterator begin() const { return Operands.begin(); }
+  iterator end() { return Operands.end(); }
+  const_iterator end() const { return Operands.end(); }
   iterator insert(iterator I, const MCOperand &Op) {
     return Operands.insert(I, Op);
   }
 
-  void print(raw_ostream &OS, const MCAsmInfo *MAI) const;
+  void print(raw_ostream &OS) const;
   void dump() const;
 
   /// \brief Dump the MCInst as prettily as possible using the additional MC
   /// structures, if given. Operators are separated by the \p Separator
   /// string.
-  void dump_pretty(raw_ostream &OS, const MCAsmInfo *MAI = 0,
-                   const MCInstPrinter *Printer = 0,
+  void dump_pretty(raw_ostream &OS, const MCInstPrinter *Printer = nullptr,
                    StringRef Separator = " ") const;
 };
 
 inline raw_ostream& operator<<(raw_ostream &OS, const MCOperand &MO) {
-  MO.print(OS, 0);
+  MO.print(OS);
   return OS;
 }
 
 inline raw_ostream& operator<<(raw_ostream &OS, const MCInst &MI) {
-  MI.print(OS, 0);
+  MI.print(OS);
   return OS;
 }