[AArch64] Add support for legacy AArch32 NEON scalar shift by immediate

[oota-llvm.git] / include / llvm / IR / IntrinsicsAArch64.td

diff --git a/include/llvm/IR/IntrinsicsAArch64.td b/include/llvm/IR/IntrinsicsAArch64.td
index 2dfe02a0b0de81844120994512b26fe3d57c1c21..782fea27f02670efa938e8dbe7c06a7593635ab6 100644 (file)
--- a/include/llvm/IR/IntrinsicsAArch64.td
+++ b/include/llvm/IR/IntrinsicsAArch64.td
@@ -232,10 +232,6 @@ class Neon_3Arg_ShiftImm_Intrinsic
 def int_aarch64_neon_vshrds_n : Neon_2Arg_ShiftImm_Intrinsic;
 def int_aarch64_neon_vshrdu_n : Neon_2Arg_ShiftImm_Intrinsic;
 
-// Scalar Rounding Shift Right (Immediate)
-def int_aarch64_neon_vrshrds_n : Neon_2Arg_ShiftImm_Intrinsic;
-def int_aarch64_neon_vrshrdu_n : Neon_2Arg_ShiftImm_Intrinsic;
-
 // Scalar Shift Right and Accumulate (Immediate)
 def int_aarch64_neon_vsrads_n : Neon_3Arg_ShiftImm_Intrinsic;
 def int_aarch64_neon_vsradu_n : Neon_3Arg_ShiftImm_Intrinsic;
@@ -251,13 +247,35 @@ def int_aarch64_neon_vshld_n : Neon_2Arg_ShiftImm_Intrinsic;
 def int_aarch64_neon_vqshls_n : Neon_N2V_Intrinsic;
 def int_aarch64_neon_vqshlu_n : Neon_N2V_Intrinsic;
 
-// Scalar Signed Saturating Shift Left Unsigned (Immediate)
-def int_aarch64_neon_vqshlus_n : Neon_N2V_Intrinsic;
-
-// Shift Right And Insert (Immediate)
-def int_aarch64_neon_vsrid_n : Neon_2Arg_ShiftImm_Intrinsic;
-
-// Shift Left And Insert (Immediate)
-def int_aarch64_neon_vslid_n : Neon_2Arg_ShiftImm_Intrinsic;
+// Scalar Signed Fixed-point Convert To Floating-Point (Immediate)
+def int_aarch64_neon_vcvtf32_n_s32 :
+  Intrinsic<[llvm_v1f32_ty], [llvm_v1i32_ty, llvm_i32_ty], [IntrNoMem]>;
+def int_aarch64_neon_vcvtf64_n_s64 :
+  Intrinsic<[llvm_v1f64_ty], [llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>;
+
+// Scalar Unsigned Fixed-point Convert To Floating-Point (Immediate)
+def int_aarch64_neon_vcvtf32_n_u32 :
+  Intrinsic<[llvm_v1f32_ty], [llvm_v1i32_ty, llvm_i32_ty], [IntrNoMem]>;
+def int_aarch64_neon_vcvtf64_n_u64 :
+  Intrinsic<[llvm_v1f64_ty], [llvm_v1i64_ty, llvm_i32_ty], [IntrNoMem]>;
+
+// Scalar Floating-point Convert To Signed Fixed-point (Immediate)
+def int_aarch64_neon_vcvts_n_s32_f32 :
+  Intrinsic<[llvm_v1i32_ty], [llvm_v1f32_ty, llvm_i32_ty], [IntrNoMem]>;
+def int_aarch64_neon_vcvtd_n_s64_f64 :
+  Intrinsic<[llvm_v1i64_ty], [llvm_v1f64_ty, llvm_i32_ty], [IntrNoMem]>;
+
+// Scalar Floating-point Convert To Unsigned Fixed-point (Immediate)
+def int_aarch64_neon_vcvts_n_u32_f32 :
+  Intrinsic<[llvm_v1i32_ty], [llvm_v1f32_ty, llvm_i32_ty], [IntrNoMem]>;
+def int_aarch64_neon_vcvtd_n_u64_f64 :
+  Intrinsic<[llvm_v1i64_ty], [llvm_v1f64_ty, llvm_i32_ty], [IntrNoMem]>;
+
+class Neon_SHA_Intrinsic
+  : Intrinsic<[llvm_v4i32_ty], [llvm_v4i32_ty, llvm_v1i32_ty, llvm_v4i32_ty],
+              [IntrNoMem]>;
 
+def int_aarch64_neon_sha1c : Neon_SHA_Intrinsic;
+def int_aarch64_neon_sha1m : Neon_SHA_Intrinsic;
+def int_aarch64_neon_sha1p : Neon_SHA_Intrinsic;
 }