void operator=(const InlineAsm&) = delete;
std::string AsmString, Constraints;
+ FunctionType *FTy;
bool HasSideEffects;
bool IsAlignStack;
AsmDialect Dialect;
- InlineAsm(PointerType *Ty, const std::string &AsmString,
+ InlineAsm(FunctionType *Ty, const std::string &AsmString,
const std::string &Constraints, bool hasSideEffects,
bool isAlignStack, AsmDialect asmDialect);
- virtual ~InlineAsm();
+ ~InlineAsm() override;
/// When the ConstantUniqueMap merges two types and makes two InlineAsms
/// identical, it destroys one of them with this method.
///
static bool Verify(FunctionType *Ty, StringRef Constraints);
- // Constraint String Parsing
+ // Constraint String Parsing
enum ConstraintPrefix {
isInput, // 'x'
isOutput, // '=x'
/// The currently selected alternative constraint index.
unsigned currentAlternativeIndex;
-
- ///Default constructor.
+
+ /// Default constructor.
ConstraintInfo();
/// Parse - Analyze the specified string (e.g. "=*&{eax}") and fill in the
/// constraints and their prefixes. If this returns an empty vector, and if
/// the constraint string itself isn't empty, there was an error parsing.
static ConstraintInfoVector ParseConstraints(StringRef ConstraintString);
-
- /// ParseConstraints - Parse the constraints of this inlineasm object,
+
+ /// ParseConstraints - Parse the constraints of this inlineasm object,
/// returning them the same way that ParseConstraints(str) does.
ConstraintInfoVector ParseConstraints() const {
return ParseConstraints(Constraints);
// Bits 2-0 - A Kind_* value indicating the kind of the operand.
// Bits 15-3 - The number of SDNode operands associated with this inline
// assembly operand.
- // If bits 2-0 are Kind_Mem:
- // Bit 31 - 0
+ // If bit 31 is set:
+ // Bit 30-16 - The operand number that this operand must match.
+ // When bits 2-0 are Kind_Mem, the Constraint_* value must be
+ // obtained from the flags for this operand number.
+ // Else if bits 2-0 are Kind_Mem:
// Bit 30-16 - A Constraint_* value indicating the original constraint
// code.
- // Else if bit 31 is set:
- // Bit 30-16 - The operand number that this operand must match.
- // Else if bit 31 is clear:
+ // Else:
// Bit 30-16 - The register class ID to use for the operand.
enum : uint32_t {
// there's plenty of space in the encoding to support the union of all
// constraint codes for all targets.
Constraint_Unknown = 0,
+ Constraint_es,
+ Constraint_i,
Constraint_m,
- Constraint_o, // Unused at the moment since Constraint_m is always used.
- Constraint_v, // Unused at the moment since Constraint_m is always used.
- Constraints_Max = Constraint_v,
+ Constraint_o,
+ Constraint_v,
+ Constraint_Q,
+ Constraint_R,
+ Constraint_S,
+ Constraint_T,
+ Constraint_Um,
+ Constraint_Un,
+ Constraint_Uq,
+ Constraint_Us,
+ Constraint_Ut,
+ Constraint_Uv,
+ Constraint_Uy,
+ Constraint_X,
+ Constraint_Z,
+ Constraint_ZC,
+ Constraint_Zy,
+ Constraints_Max = Constraint_Zy,
Constraints_ShiftAmount = 16,
Flag_MatchingOperand = 0x80000000
}
/// getFlagWordForMatchingOp - Augment an existing flag word returned by
- /// getFlagWord with information indicating that this input operand is tied
+ /// getFlagWord with information indicating that this input operand is tied
/// to a previous output operand.
static unsigned getFlagWordForMatchingOp(unsigned InputFlag,
unsigned MatchedOperandNo) {
return InputFlag | (Constraint << Constraints_ShiftAmount);
}
+ static unsigned convertMemFlagWordToMatchingFlagWord(unsigned InputFlag) {
+ assert(isMemKind(InputFlag));
+ return InputFlag & ~(0x7fff << Constraints_ShiftAmount);
+ }
+
static unsigned getKind(unsigned Flags) {
return Flags & 7;
}