DebugInfo: Remove DITypedArray<>, replace with typedefs

[oota-llvm.git] / include / llvm / IR / InlineAsm.h

diff --git a/include/llvm/IR/InlineAsm.h b/include/llvm/IR/InlineAsm.h
index 84ae9df9715769fdd941a7f1652e0d1dfe30e129..6ae4122d936e71a3e9f7da86b3463247a9e6d7fa 100644 (file)
--- a/include/llvm/IR/InlineAsm.h
+++ b/include/llvm/IR/InlineAsm.h
@@ -189,6 +189,20 @@ public:
   
   // These are helper methods for dealing with flags in the INLINEASM SDNode
   // in the backend.
+  //
+  // The encoding of the flag word is currently:
+  //   Bits 2-0 - A Kind_* value indicating the kind of the operand.
+  //   Bits 15-3 - The number of SDNode operands associated with this inline
+  //               assembly operand.
+  //   If bit 31 is set:
+  //     Bit 30-16 - The operand number that this operand must match.
+  //                 When bits 2-0 are Kind_Mem, the Constraint_* value must be
+  //                 obtained from the flags for this operand number.
+  //   Else if bits 2-0 are Kind_Mem:
+  //     Bit 30-16 - A Constraint_* value indicating the original constraint
+  //                 code.
+  //   Else:
+  //     Bit 30-16 - The register class ID to use for the operand.
   
   enum : uint32_t {
     // Fixed operands on an INLINEASM SDNode.
@@ -220,6 +234,26 @@ public:
     Kind_Imm = 5,                // Immediate.
     Kind_Mem = 6,                // Memory operand, "m".
 
+    // Memory constraint codes.
+    // These could be tablegenerated but there's little need to do that since
+    // there's plenty of space in the encoding to support the union of all
+    // constraint codes for all targets.
+    Constraint_Unknown = 0,
+    Constraint_es,
+    Constraint_i,
+    Constraint_m,
+    Constraint_o,
+    Constraint_v,
+    Constraint_Q,
+    Constraint_R,
+    Constraint_S,
+    Constraint_T,
+    Constraint_Z,
+    Constraint_ZC,
+    Constraint_Zy,
+    Constraints_Max = Constraint_Zy,
+    Constraints_ShiftAmount = 16,
+
     Flag_MatchingOperand = 0x80000000
   };
   
@@ -252,6 +286,20 @@ public:
     return InputFlag | (RC << 16);
   }
 
+  /// Augment an existing flag word returned by getFlagWord with the constraint
+  /// code for a memory constraint.
+  static unsigned getFlagWordForMem(unsigned InputFlag, unsigned Constraint) {
+    assert(Constraint <= 0x7fff && "Too large a memory constraint ID");
+    assert(Constraint <= Constraints_Max && "Unknown constraint ID");
+    assert((InputFlag & ~0xffff) == 0 && "High bits already contain data");
+    return InputFlag | (Constraint << Constraints_ShiftAmount);
+  }
+
+  static unsigned convertMemFlagWordToMatchingFlagWord(unsigned InputFlag) {
+    assert(isMemKind(InputFlag));
+    return InputFlag & ~(0x7fff << Constraints_ShiftAmount);
+  }
+
   static unsigned getKind(unsigned Flags) {
     return Flags & 7;
   }
@@ -266,6 +314,11 @@ public:
     return getKind(Flag) == Kind_Clobber;
   }
 
+  static unsigned getMemoryConstraintID(unsigned Flag) {
+    assert(isMemKind(Flag));
+    return (Flag >> Constraints_ShiftAmount) & 0x7fff;
+  }
+
   /// getNumOperandRegisters - Extract the number of registers field from the
   /// inline asm operand flag.
   static unsigned getNumOperandRegisters(unsigned Flag) {