SmallVector<unsigned, 16> ResourceFactors;
unsigned MicroOpFactor; // Multiply to normalize microops to resource units.
unsigned ResourceLCM; // Resource units per cycle. Latency normalization factor.
+
+ unsigned computeInstrLatency(const MCSchedClassDesc &SCDesc) const;
+
public:
- TargetSchedModel(): STI(0), TII(0) {}
+ TargetSchedModel(): SchedModel(MCSchedModel::GetDefaultSchedModel()), STI(nullptr), TII(nullptr) {}
/// \brief Initialize the machine model for instruction scheduling.
///
const InstrItineraryData *getInstrItineraries() const {
if (hasInstrItineraries())
return &InstrItins;
- return 0;
+ return nullptr;
+ }
+
+ /// \brief Return true if this machine model includes an instruction-level
+ /// scheduling model or cycle-to-cycle itinerary data.
+ bool hasInstrSchedModelOrItineraries() const {
+ return hasInstrSchedModel() || hasInstrItineraries();
}
/// \brief Identify the processor corresponding to the current subtarget.
/// \brief Return the number of issue slots required for this MI.
unsigned getNumMicroOps(const MachineInstr *MI,
- const MCSchedClassDesc *SC = 0) const;
+ const MCSchedClassDesc *SC = nullptr) const;
/// \brief Get the number of kinds of resources for this target.
unsigned getNumProcResourceKinds() const {
return SchedModel.getProcResource(PIdx);
}
+#ifndef NDEBUG
+ const char *getResourceName(unsigned PIdx) const {
+ if (!PIdx)
+ return "MOps";
+ return SchedModel.getProcResource(PIdx)->Name;
+ }
+#endif
+
typedef const MCWriteProcResEntry *ProcResIter;
// \brief Get an iterator into the processor resources consumed by this
/// model.
///
/// Compute and return the expected latency of this instruction independent of
- /// a particular use. computeOperandLatency is the prefered API, but this is
+ /// a particular use. computeOperandLatency is the preferred API, but this is
/// occasionally useful to help estimate instruction cost.
///
/// If UseDefaultDefLatency is false and no new machine sched model is
/// if converter after moving it to TargetSchedModel).
unsigned computeInstrLatency(const MachineInstr *MI,
bool UseDefaultDefLatency = true) const;
+ unsigned computeInstrLatency(unsigned Opcode) const;
/// \brief Output dependency latency of a pair of defs of the same register.
///