Now that the ISel is available, it's possible to create a default instruction

[oota-llvm.git] / include / llvm / CodeGen / SelectionDAGISel.h

diff --git a/include/llvm/CodeGen/SelectionDAGISel.h b/include/llvm/CodeGen/SelectionDAGISel.h
index 2bf34071990747d79830e4dd9ea0d6018a7986cb..e5d024a892f2a1e3f5bfe9c261ce9bca7d82551f 100644 (file)
--- a/include/llvm/CodeGen/SelectionDAGISel.h
+++ b/include/llvm/CodeGen/SelectionDAGISel.h
@@ -40,7 +40,9 @@ public:
   SelectionDAG *CurDAG;
   MachineBasicBlock *BB;
 
-  SelectionDAGISel(TargetLowering &tli) : TLI(tli) {}
+  SelectionDAGISel(TargetLowering &tli) : TLI(tli), JT(0,0,0,0) {}
+  
+  TargetLowering &getTargetLowering() { return TLI; }
 
   virtual void getAnalysisUsage(AnalysisUsage &AU) const;
 
@@ -62,6 +64,10 @@ public:
                                             SelectionDAG &DAG) {
     return true;
   }
+
+  /// CanBeFoldedBy - Returns true if the specific operand node N of U can be
+  /// folded during instruction selection?
+  virtual bool CanBeFoldedBy(SDNode *N, SDNode *U) { return true; }
   
   /// CreateTargetHazardRecognizer - Return a newly allocated hazard recognizer
   /// to use for this target when scheduling the DAG.
@@ -87,6 +93,20 @@ public:
     // ThisBB - the blcok into which to emit the code for the setcc and branches
     MachineBasicBlock *ThisBB;
   };
+  struct JumpTable {
+    JumpTable(unsigned R, unsigned J, MachineBasicBlock *M,
+              MachineBasicBlock *D) : Reg(R), JTI(J), MBB(M), Default(D) {}
+    // Reg - the virtual register containing the index of the jump table entry
+    // to jump to.
+    unsigned Reg;
+    // JTI - the JumpTableIndex for this jump table in the function.
+    unsigned JTI;
+    // MBB - the MBB into which to emit the code for the indirect jump.
+    MachineBasicBlock *MBB;
+    // Default - the MBB of the default bb, which is a successor of the range
+    // check MBB.  This is when updating PHI nodes in successors.
+    MachineBasicBlock *Default;
+  };
   
 protected:
   /// Pick a safe ordering and emit instructions for each target node in the
@@ -97,7 +117,7 @@ protected:
   /// by tblgen.  Others should not call it.
   void SelectInlineAsmMemoryOperands(std::vector<SDOperand> &Ops,
                                      SelectionDAG &DAG);
-  
+
 private:
   SDOperand CopyValueToVirtualRegister(SelectionDAGLowering &SDL,
                                        Value *V, unsigned Reg);
@@ -114,6 +134,9 @@ private:
   /// SwitchCases - Vector of CaseBlock structures used to communicate
   /// SwitchInst code generation information.
   std::vector<CaseBlock> SwitchCases;
+
+  /// JT - Record which holds necessary information for emitting a jump table
+  JumpTable JT;
 };
 
 }