//
//===----------------------------------------------------------------------===//
-#ifndef LLVM_CODEGEN_REGISTER_SCAVENGING_H
-#define LLVM_CODEGEN_REGISTER_SCAVENGING_H
+#ifndef LLVM_CODEGEN_REGISTERSCAVENGING_H
+#define LLVM_CODEGEN_REGISTERSCAVENGING_H
-#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/ADT/BitVector.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
namespace llvm {
class TargetRegisterClass;
class RegScavenger {
+ const TargetRegisterInfo *TRI;
+ const TargetInstrInfo *TII;
+ MachineRegisterInfo* MRI;
MachineBasicBlock *MBB;
MachineBasicBlock::iterator MBBI;
- unsigned NumPhysRegs;
+ unsigned NumRegUnits;
/// Tracking - True if RegScavenger is currently tracking the liveness of
/// registers.
bool Tracking;
- /// ScavengingFrameIndex - Special spill slot used for scavenging a register
- /// post register allocation.
- int ScavengingFrameIndex;
+ /// Information on scavenged registers (held in a spill slot).
+ struct ScavengedInfo {
+ ScavengedInfo(int FI = -1) : FrameIndex(FI), Reg(0), Restore(nullptr) {}
- /// ScavengedReg - If none zero, the specific register is currently being
- /// scavenged. That is, it is spilled to the special scavenging stack slot.
- unsigned ScavengedReg;
+ /// A spill slot used for scavenging a register post register allocation.
+ int FrameIndex;
- /// ScavengedRC - Register class of the scavenged register.
- ///
- const TargetRegisterClass *ScavengedRC;
+ /// If non-zero, the specific register is currently being
+ /// scavenged. That is, it is spilled to this scavenging stack slot.
+ unsigned Reg;
+
+ /// The instruction that restores the scavenged register from stack.
+ const MachineInstr *Restore;
+ };
+
+ /// A vector of information on scavenged registers.
+ SmallVector<ScavengedInfo, 2> Scavenged;
- /// RegsAvailable - The current state of all the physical registers immediately
- /// before MBBI. One bit per physical register. If bit is set that means it's
- /// available, unset means the register is currently being used.
- BitVector RegsAvailable;
+ /// RegUnitsAvailable - The current state of each reg unit immediatelly
+ /// before MBBI. One bit per register unit. If bit is not set it means any
+ /// register containing that register unit is currently being used.
+ BitVector RegUnitsAvailable;
- /// ImplicitDefed - If bit is set that means the register is defined by an
- /// implicit_def instructions. That means it can be clobbered at will.
- BitVector ImplicitDefed;
+ // These BitVectors are only used internally to forward(). They are members
+ // to avoid frequent reallocations.
+ BitVector KillRegUnits, DefRegUnits;
+ BitVector TmpRegUnits;
public:
RegScavenger()
- : MBB(NULL), NumPhysRegs(0), Tracking(false),
- ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
-
- explicit RegScavenger(MachineBasicBlock *mbb)
- : MBB(mbb), NumPhysRegs(0), Tracking(false),
- ScavengingFrameIndex(-1), ScavengedReg(0), ScavengedRC(NULL) {}
+ : MBB(nullptr), NumRegUnits(0), Tracking(false) {}
/// enterBasicBlock - Start tracking liveness from the begin of the specific
/// basic block.
void enterBasicBlock(MachineBasicBlock *mbb);
- /// forward / backward - Move the internal MBB iterator and update register
- /// states.
+ /// initRegState - allow resetting register state info for multiple
+ /// passes over/within the same function.
+ void initRegState();
+
+ /// forward - Move the internal MBB iterator and update register states.
void forward();
- void backward();
- /// forward / backward - Move the internal MBB iterator and update register
- /// states until it has processed the specific iterator.
+ /// forward - Move the internal MBB iterator and update register states until
+ /// it has processed the specific iterator.
void forward(MachineBasicBlock::iterator I) {
+ if (!Tracking && MBB->begin() != I) forward();
while (MBBI != I) forward();
}
- void backward(MachineBasicBlock::iterator I) {
- while (MBBI != I) backward();
+
+ /// Invert the behavior of forward() on the current instruction (undo the
+ /// changes to the available registers made by forward()).
+ void unprocess();
+
+ /// Unprocess instructions until you reach the provided iterator.
+ void unprocess(MachineBasicBlock::iterator I) {
+ while (MBBI != I) unprocess();
}
/// skipTo - Move the internal MBB iterator but do not update register states.
- ///
- void skipTo(MachineBasicBlock::iterator I) { MBBI = I; }
-
- /// isReserved - Returns true if a register is reserved. It is never "unused".
- bool isReserved(unsigned Reg) const { return ReservedRegs[Reg]; }
+ void skipTo(MachineBasicBlock::iterator I) {
+ if (I == MachineBasicBlock::iterator(nullptr))
+ Tracking = false;
+ MBBI = I;
+ }
- /// isUsed / isUsed - Test if a register is currently being used.
- ///
- bool isUsed(unsigned Reg) const { return !RegsAvailable[Reg]; }
- bool isUnused(unsigned Reg) const { return RegsAvailable[Reg]; }
+ MachineBasicBlock::iterator getCurrentPosition() const {
+ return MBBI;
+ }
+
+ /// isRegUsed - return if a specific register is currently used.
+ bool isRegUsed(unsigned Reg, bool includeReserved = true) const;
- bool isImplicitlyDefined(unsigned Reg) const { return ImplicitDefed[Reg]; }
+ /// getRegsAvailable - Return all available registers in the register class
+ /// in Mask.
+ BitVector getRegsAvailable(const TargetRegisterClass *RC);
- /// getRegsUsed - return all registers currently in use in used.
- void getRegsUsed(BitVector &used, bool includeReserved);
+ /// FindUnusedReg - Find a unused register of the specified register class.
+ /// Return 0 if none is found.
+ unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
- /// setUsed / setUnused - Mark the state of one or a number of registers.
- ///
- void setUsed(unsigned Reg, bool ImpDef = false);
- void setUsed(BitVector Regs, bool ImpDef = false) {
- RegsAvailable &= ~Regs;
- if (ImpDef)
- ImplicitDefed |= Regs;
- else
- ImplicitDefed &= ~Regs;
- }
- void setUnused(unsigned Reg, const MachineInstr *MI);
- void setUnused(BitVector Regs) {
- RegsAvailable |= Regs;
- ImplicitDefed &= ~Regs;
+ /// Add a scavenging frame index.
+ void addScavengingFrameIndex(int FI) {
+ Scavenged.push_back(ScavengedInfo(FI));
}
- /// FindUnusedReg - Find a unused register of the specified register class
- /// from the specified set of registers. It return 0 is none is found.
- unsigned FindUnusedReg(const TargetRegisterClass *RegClass,
- const BitVector &Candidates) const;
+ /// Query whether a frame index is a scavenging frame index.
+ bool isScavengingFrameIndex(int FI) const {
+ for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
+ IE = Scavenged.end(); I != IE; ++I)
+ if (I->FrameIndex == FI)
+ return true;
- /// FindUnusedReg - Find a unused register of the specified register class.
- /// Exclude callee saved registers if directed. It return 0 is none is found.
- unsigned FindUnusedReg(const TargetRegisterClass *RegClass,
- bool ExCalleeSaved = false) const;
+ return false;
+ }
- /// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter of
- /// ScavengingFrameIndex.
- void setScavengingFrameIndex(int FI) { ScavengingFrameIndex = FI; }
- int getScavengingFrameIndex() const { return ScavengingFrameIndex; }
+ /// Get an array of scavenging frame indices.
+ void getScavengingFrameIndices(SmallVectorImpl<int> &A) const {
+ for (SmallVectorImpl<ScavengedInfo>::const_iterator I = Scavenged.begin(),
+ IE = Scavenged.end(); I != IE; ++I)
+ if (I->FrameIndex >= 0)
+ A.push_back(I->FrameIndex);
+ }
/// scavengeRegister - Make a register of the specific register class
/// available and do the appropriate bookkeeping. SPAdj is the stack
return scavengeRegister(RegClass, MBBI, SPAdj);
}
+ /// setRegUsed - Tell the scavenger a register is used.
+ ///
+ void setRegUsed(unsigned Reg);
private:
- const TargetRegisterInfo *TRI;
- const TargetInstrInfo *TII;
- MachineRegisterInfo* MRI;
+ /// isReserved - Returns true if a register is reserved. It is never "unused".
+ bool isReserved(unsigned Reg) const { return MRI->isReserved(Reg); }
- /// CalleeSavedrRegs - A bitvector of callee saved registers for the target.
+ /// setUsed / setUnused - Mark the state of one or a number of register units.
///
- BitVector CalleeSavedRegs;
+ void setUsed(BitVector &RegUnits) {
+ RegUnitsAvailable.reset(RegUnits);
+ }
+ void setUnused(BitVector &RegUnits) {
+ RegUnitsAvailable |= RegUnits;
+ }
- /// ReservedRegs - A bitvector of reserved registers.
+ /// Processes the current instruction and fill the KillRegUnits and
+ /// DefRegUnits bit vectors.
+ void determineKillsAndDefs();
+
+ /// Add all Reg Units that Reg contains to BV.
+ void addRegUnits(BitVector &BV, unsigned Reg);
+
+ /// findSurvivorReg - Return the candidate register that is unused for the
+ /// longest after StartMI. UseMI is set to the instruction where the search
+ /// stopped.
///
- BitVector ReservedRegs;
+ /// No more than InstrLimit instructions are inspected.
+ unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
+ BitVector &Candidates,
+ unsigned InstrLimit,
+ MachineBasicBlock::iterator &UseMI);
- /// restoreScavengedReg - Restore scavenged by loading it back from the
- /// emergency spill slot. Mark it used.
- void restoreScavengedReg();
};
-
+
} // End llvm namespace
#endif