/// getRegsUsed - return all registers currently in use in used.
void getRegsUsed(BitVector &used, bool includeReserved);
- /// FindUnusedReg - Find a unused register of the specified register class
- /// from the specified set of registers. It return 0 is none is found.
- unsigned FindUnusedReg(const TargetRegisterClass *RegClass,
- const BitVector &Candidates) const;
+ /// getRegsAvailable - Return all available registers in the register class
+ /// in Mask.
+ BitVector getRegsAvailable(const TargetRegisterClass *RC);
/// FindUnusedReg - Find a unused register of the specified register class.
- /// Exclude callee saved registers if directed. It return 0 is none is found.
- unsigned FindUnusedReg(const TargetRegisterClass *RegClass,
- bool ExCalleeSaved = false) const;
+ /// Return 0 if none is found.
+ unsigned FindUnusedReg(const TargetRegisterClass *RegClass) const;
/// setScavengingFrameIndex / getScavengingFrameIndex - accessor and setter of
/// ScavengingFrameIndex.
return scavengeRegister(RegClass, MBBI, SPAdj);
}
+ /// setUsed - Tell the scavenger a register is used.
+ ///
+ void setUsed(unsigned Reg);
private:
/// isReserved - Returns true if a register is reserved. It is never "unused".
bool isReserved(unsigned Reg) const { return ReservedRegs.test(Reg); }
- /// isUsed / isUsed - Test if a register is currently being used.
+ /// isUsed / isUnused - Test if a register is currently being used.
///
bool isUsed(unsigned Reg) const { return !RegsAvailable.test(Reg); }
bool isUnused(unsigned Reg) const { return RegsAvailable.test(Reg); }
/// setUsed / setUnused - Mark the state of one or a number of registers.
///
- void setUsed(unsigned Reg);
void setUsed(BitVector &Regs) {
RegsAvailable &= ~Regs;
}
/// Add Reg and its aliases to BV.
void addRegWithAliases(BitVector &BV, unsigned Reg);
+
+ /// findSurvivorReg - Return the candidate register that is unused for the
+ /// longest after StartMI. UseMI is set to the instruction where the search
+ /// stopped.
+ ///
+ /// No more than InstrLimit instructions are inspected.
+ unsigned findSurvivorReg(MachineBasicBlock::iterator StartMI,
+ BitVector &Candidates,
+ unsigned InstrLimit,
+ MachineBasicBlock::iterator &UseMI);
+
};
} // End llvm namespace