//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
class FunctionPass;
class PassInfo;
class TargetMachine;
+ class TargetLowering;
+ class RegisterCoalescer;
/// createUnreachableBlockEliminationPass - The LLVM code generator does not
/// work well with unreachable basic blocks (what live ranges make sense for a
FunctionPass *createMachineFunctionPrinterPass(std::ostream *OS,
const std::string &Banner ="");
+ /// MachineLoopInfo pass - This pass is a loop analysis pass.
+ ///
+ extern const PassInfo *const MachineLoopInfoID;
+
+ /// MachineDominators pass - This pass is a machine dominators analysis pass.
+ ///
+ extern const PassInfo *const MachineDominatorsID;
+
/// PHIElimination pass - This pass eliminates machine instruction PHI nodes
/// by inserting copy instructions. This destroys SSA information, but is the
/// desired input for some register allocators. This pass is "required" by
/// these register allocator like this: AU.addRequiredID(PHIEliminationID);
///
- extern const PassInfo *PHIEliminationID;
+ extern const PassInfo *const PHIEliminationID;
+
+ /// StrongPHIElimination pass - This pass eliminates machine instruction PHI
+ /// nodes by inserting copy instructions. This destroys SSA information, but
+ /// is the desired input for some register allocators. This pass is
+ /// "required" by these register allocator like this:
+ /// AU.addRequiredID(PHIEliminationID);
+ /// This pass is still in development
+ extern const PassInfo *const StrongPHIEliminationID;
+
+ extern const PassInfo *const PreAllocSplittingID;
+
+ /// SimpleRegisterCoalescing pass. Aggressively coalesces every register
+ /// copy it can.
+ ///
+ extern const PassInfo *const SimpleRegisterCoalescingID;
/// TwoAddressInstruction pass - This pass reduces two-address instructions to
/// use two operands. This destroys SSA information but it is desired by
/// register allocators.
- extern const PassInfo *TwoAddressInstructionPassID;
+ extern const PassInfo *const TwoAddressInstructionPassID;
+
+ /// UnreachableMachineBlockElimination pass - This pass removes unreachable
+ /// machine basic blocks.
+ extern const PassInfo *const UnreachableMachineBlockElimID;
+
+ /// DeadMachineInstructionElim pass - This pass removes dead machine
+ /// instructions.
+ ///
+ FunctionPass *createDeadMachineInstructionElimPass();
/// Creates a register allocator as the user specified on the command line.
///
///
FunctionPass *createLocalRegisterAllocator();
+ /// BigBlockRegisterAllocation Pass - The BigBlock register allocator
+ /// munches single basic blocks at a time, like the local register
+ /// allocator. While the BigBlock allocator is a little slower, and uses
+ /// somewhat more memory than the local register allocator, it tends to
+ /// yield the best allocations (of any of the allocators) for blocks that
+ /// have hundreds or thousands of instructions in sequence.
+ ///
+ FunctionPass *createBigBlockRegisterAllocator();
+
/// LinearScanRegisterAllocation Pass - This pass implements the linear scan
/// register allocation algorithm, a global register allocator.
///
FunctionPass *createLinearScanRegisterAllocator();
+ /// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
+ /// Quadratic Prograaming (PBQP) based register allocator.
+ ///
+ FunctionPass *createPBQPRegisterAllocator();
+
+ /// SimpleRegisterCoalescing Pass - Coalesce all copies possible. Can run
+ /// independently of the register allocator.
+ ///
+ RegisterCoalescer *createSimpleRegisterCoalescer();
+
/// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code,
/// and eliminates abstract frame references.
///
FunctionPass *createPrologEpilogCodeInserter();
+
+ /// LowerSubregs Pass - This pass lowers subregs to register-register copies
+ /// which yields suboptimal, but correct code if the register allocator
+ /// cannot coalesce all subreg operations during allocation.
+ ///
+ FunctionPass *createLowerSubregsPass();
+
+ /// createPostRAScheduler - under development.
+ FunctionPass *createPostRAScheduler();
/// BranchFolding Pass - This pass performs machine code CFG based
/// optimizations to delete branches to branches, eliminate branches to
/// IfConverter Pass - This pass performs machine code if conversion.
FunctionPass *createIfConverterPass();
+ /// Code Placement Pass - This pass optimize code placement and aligns loop
+ /// headers to target specific alignment boundary.
+ FunctionPass *createCodePlacementOptPass();
+
/// DebugLabelFoldingPass - This pass prunes out redundant debug labels. This
/// allows a debug emitter to determine if the range of two labels is empty,
/// by seeing if the labels map to the same reduced label.
/// for the Sparc.
FunctionPass *getRegisterAllocator(TargetMachine &T);
- //createModuloSchedulingPass - Creates the Swing Modulo Scheduling Pass
- FunctionPass *createModuloSchedulingPass(TargetMachine & targ);
+ /// IntrinsicLowering Pass - Performs target-independent LLVM IR
+ /// transformations for highly portable strategies.
+ FunctionPass *createGCLoweringPass();
+
+ /// MachineCodeAnalysis Pass - Target-independent pass to mark safe points in
+ /// machine code. Must be added very late during code generation, just prior
+ /// to output, and importantly after all CFG transformations (such as branch
+ /// folding).
+ FunctionPass *createGCMachineCodeAnalysisPass();
+
+ /// Deleter Pass - Releases GC metadata.
+ ///
+ FunctionPass *createGCInfoDeleter();
+
+ /// Creates a pass to print GC metadata.
+ ///
+ FunctionPass *createGCInfoPrinter(std::ostream &OS);
+
+ /// createMachineLICMPass - This pass performs LICM on machine instructions.
+ ///
+ FunctionPass *createMachineLICMPass();
+
+ /// createMachineSinkingPass - This pass performs sinking on machine
+ /// instructions.
+ FunctionPass *createMachineSinkingPass();
+
+ /// createStackSlotColoringPass - This pass performs stack slot coloring.
+ FunctionPass *createStackSlotColoringPass(bool);
+
+ /// createStackProtectorPass - This pass adds stack protectors to functions.
+ FunctionPass *createStackProtectorPass(const TargetLowering *tli);
+
+ /// createMachineVerifierPass - This pass verifies cenerated machine code
+ /// instructions for correctness.
+ ///
+ /// @param allowPhysDoubleDefs ignore double definitions of
+ /// registers. Useful before LiveVariables has run.
+ FunctionPass *createMachineVerifierPass(bool allowDoubleDefs);
- //createModuloSchedulingPass - Creates the Swing Modulo Scheduling Pass
- FunctionPass *createModuloSchedulingSBPass(TargetMachine & targ);
+ /// createDwarfEHPass - This pass mulches exception handling code into a form
+ /// adapted to code generation. Required if using dwarf exception handling.
+ FunctionPass *createDwarfEHPass(const TargetLowering *tli, bool fast);
} // End llvm namespace