#define LLVM_CODEGEN_MACHINEOPERAND_H
#include "llvm/Support/DataTypes.h"
-#include <vector>
#include <cassert>
#include <iosfwd>
namespace llvm {
+class ConstantFP;
class MachineBasicBlock;
class GlobalValue;
class MachineInstr;
class TargetMachine;
class MachineRegisterInfo;
+class raw_ostream;
/// MachineOperand class - Representation of each machine instruction operand.
///
enum MachineOperandType {
MO_Register, // Register operand.
MO_Immediate, // Immediate Operand
+ MO_FPImmediate,
MO_MachineBasicBlock, // MachineBasicBlock reference
MO_FrameIndex, // Abstract Stack Frame Index
MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
/// This is only valid on definitions of registers.
bool IsDead : 1;
+ /// IsEarlyClobber flag - this is only valid for MO_Register operands in
+ /// an inline asm.
+
+ /// IsEarlyClobber - True if this operand is marked earlyclobber in an
+ /// inline asm. See gcc doc for description of earlyclobber.
+ bool IsEarlyClobber : 1;
+
/// SubReg - Subregister number, only valid for MO_Register. A value of 0
/// indicates the MO_Register has no subReg.
unsigned char SubReg;
/// Contents union - This contains the payload for the various operand types.
union {
MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
+ const ConstantFP *CFP; // For MO_FPImmediate.
int64_t ImmVal; // For MO_Immediate.
struct { // For MO_Register.
} OffsetedInfo;
} Contents;
- MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {}
+ explicit MachineOperand(MachineOperandType K) : OpKind(K), ParentMI(0) {}
public:
MachineOperand(const MachineOperand &M) {
*this = M;
const MachineInstr *getParent() const { return ParentMI; }
void print(std::ostream &os, const TargetMachine *TM = 0) const;
+ void print(raw_ostream &os, const TargetMachine *TM = 0) const;
/// Accessors that tell you what kind of MachineOperand you're looking at.
///
bool isRegister() const { return OpKind == MO_Register; }
bool isImmediate() const { return OpKind == MO_Immediate; }
+ bool isFPImmediate() const { return OpKind == MO_FPImmediate; }
bool isMachineBasicBlock() const { return OpKind == MO_MachineBasicBlock; }
bool isFrameIndex() const { return OpKind == MO_FrameIndex; }
bool isConstantPoolIndex() const { return OpKind == MO_ConstantPoolIndex; }
bool isGlobalAddress() const { return OpKind == MO_GlobalAddress; }
bool isExternalSymbol() const { return OpKind == MO_ExternalSymbol; }
- bool isReg() const { return OpKind == MO_Register; }
- bool isImm() const { return OpKind == MO_Immediate; }
- bool isMBB() const { return OpKind == MO_MachineBasicBlock; }
- bool isFI() const { return OpKind == MO_FrameIndex; }
- bool isCPI() const { return OpKind == MO_ConstantPoolIndex; }
- bool isJTI() const { return OpKind == MO_JumpTableIndex; }
- bool isGlobal() const { return OpKind == MO_GlobalAddress; }
- bool isSymbol() const { return OpKind == MO_ExternalSymbol; }
-
//===--------------------------------------------------------------------===//
// Accessors for Register Operands
//===--------------------------------------------------------------------===//
return IsKill;
}
+ bool isEarlyClobber() const {
+ assert(isRegister() && "Wrong MachineOperand accessor");
+ return IsEarlyClobber;
+ }
+
/// getNextOperandForReg - Return the next MachineOperand in the function that
/// uses or defines this register.
MachineOperand *getNextOperandForReg() const {
IsDead = Val;
}
+ void setIsEarlyClobber(bool Val = true) {
+ assert(isRegister() && IsDef && "Wrong MachineOperand accessor");
+ IsEarlyClobber = Val;
+ }
//===--------------------------------------------------------------------===//
// Accessors for various operand types.
return Contents.ImmVal;
}
+ const ConstantFP *getFPImm() const {
+ assert(isFPImmediate() && "Wrong MachineOperand accessor");
+ return Contents.CFP;
+ }
+
MachineBasicBlock *getMBB() const {
assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
return Contents.MBB;
/// the specified value. If an operand is known to be an register already,
/// the setReg method should be used.
void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
- bool isKill = false, bool isDead = false);
+ bool isKill = false, bool isDead = false,
+ bool isEarlyClobber = false);
//===--------------------------------------------------------------------===//
// Construction methods.
return Op;
}
+ static MachineOperand CreateFPImm(const ConstantFP *CFP) {
+ MachineOperand Op(MachineOperand::MO_FPImmediate);
+ Op.Contents.CFP = CFP;
+ return Op;
+ }
+
static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
bool isKill = false, bool isDead = false,
- unsigned SubReg = 0) {
+ unsigned SubReg = 0,
+ bool isEarlyClobber = false) {
MachineOperand Op(MachineOperand::MO_Register);
Op.IsDef = isDef;
Op.IsImp = isImp;
Op.IsKill = isKill;
Op.IsDead = isDead;
+ Op.IsEarlyClobber = isEarlyClobber;
Op.Contents.Reg.RegNo = Reg;
Op.Contents.Reg.Prev = 0;
Op.Contents.Reg.Next = 0;
IsImp = MO.IsImp;
IsKill = MO.IsKill;
IsDead = MO.IsDead;
+ IsEarlyClobber = MO.IsEarlyClobber;
SubReg = MO.SubReg;
ParentMI = MO.ParentMI;
Contents = MO.Contents;
/// or false if not. This can only be called for register operands that are
/// part of a machine instruction.
bool isOnRegUseList() const {
- assert(isReg() && "Can only add reg operand to use lists");
+ assert(isRegister() && "Can only add reg operand to use lists");
return Contents.Reg.Prev != 0;
}
void AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo);
void RemoveRegOperandFromRegInfo() {
- assert(isOnRegUseList() && "Can only add reg operand to use lists");
+ assert(isOnRegUseList() && "Reg operand is not on a use list");
// Unlink this from the doubly linked list of operands.
MachineOperand *NextOp = Contents.Reg.Next;
*Contents.Reg.Prev = NextOp;
return OS;
}
+inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) {
+ MO.print(OS, 0);
+ return OS;
+}
+
} // End llvm namespace
#endif
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