//===-- CodeGen/MachineInstBuilder.h - Simplify creation of MIs -*- C++ -*-===//
-//
+//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
-//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
//===----------------------------------------------------------------------===//
//
// This file exposes a function named BuildMI, which is useful for dramatically
-// simplifying how MachineInstr's are created. Instead of using code like this:
-//
-// M = new MachineInstr(X86::ADDrr8);
-// M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, argVal1);
-// M->SetMachineOperandVal(1, MachineOperand::MO_VirtualRegister, argVal2);
-//
-// we can now use code like this:
+// simplifying how MachineInstr's are created. It allows use of code like this:
//
// M = BuildMI(X86::ADDrr8, 2).addReg(argVal1).addReg(argVal2);
//
#ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
#define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
-#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineFunction.h"
namespace llvm {
+class TargetInstrDesc;
+class MDNode;
+
+namespace RegState {
+ enum {
+ Define = 0x2,
+ Implicit = 0x4,
+ Kill = 0x8,
+ Dead = 0x10,
+ Undef = 0x20,
+ EarlyClobber = 0x40,
+ ImplicitDefine = Implicit | Define,
+ ImplicitKill = Implicit | Kill
+ };
+}
+
class MachineInstrBuilder {
MachineInstr *MI;
public:
- MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
+ MachineInstrBuilder() : MI(0) {}
+ explicit MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
/// Allow automatic conversion to the machine instruction we are working on.
///
/// addReg - Add a new virtual register operand...
///
- const MachineInstrBuilder &addReg(
- int RegNo,
- MachineOperand::UseType Ty = MachineOperand::Use) const {
- MI->addRegOperand(RegNo, Ty);
+ const
+ MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
+ unsigned SubReg = 0) const {
+ assert((flags & 0x1) == 0 &&
+ "Passing in 'true' to addReg is forbidden! Use enums instead.");
+ MI->addOperand(MachineOperand::CreateReg(RegNo,
+ flags & RegState::Define,
+ flags & RegState::Implicit,
+ flags & RegState::Kill,
+ flags & RegState::Dead,
+ flags & RegState::Undef,
+ flags & RegState::EarlyClobber,
+ SubReg));
return *this;
}
- /// addReg - Add an LLVM value that is to be used as a register...
+ /// addImm - Add a new immediate operand.
///
- const MachineInstrBuilder &addReg(
- Value *V,
- MachineOperand::UseType Ty = MachineOperand::Use) const {
- MI->addRegOperand(V, Ty);
+ const MachineInstrBuilder &addImm(int64_t Val) const {
+ MI->addOperand(MachineOperand::CreateImm(Val));
return *this;
}
- /// addReg - Add an LLVM value that is to be used as a register...
- ///
- const MachineInstrBuilder &addCCReg(
- Value *V,
- MachineOperand::UseType Ty = MachineOperand::Use) const {
- MI->addCCRegOperand(V, Ty);
+ const MachineInstrBuilder &addFPImm(const ConstantFP *Val) const {
+ MI->addOperand(MachineOperand::CreateFPImm(Val));
return *this;
}
- /// addRegDef - Add an LLVM value that is to be defined as a register... this
- /// is the same as addReg(V, MachineOperand::Def).
- ///
- const MachineInstrBuilder &addRegDef(Value *V) const {
- return addReg(V, MachineOperand::Def);
- }
-
- /// addPCDisp - Add an LLVM value to be treated as a PC relative
- /// displacement...
- ///
- const MachineInstrBuilder &addPCDisp(Value *V) const {
- MI->addPCDispOperand(V);
+ const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
+ unsigned char TargetFlags = 0) const {
+ MI->addOperand(MachineOperand::CreateMBB(MBB, TargetFlags));
return *this;
}
- /// addMReg - Add a machine register operand...
- ///
- const MachineInstrBuilder &addMReg(int Reg, MachineOperand::UseType Ty
- = MachineOperand::Use) const {
- MI->addMachineRegOperand(Reg, Ty);
- return *this;
- }
-
- /// addImm - Add a new immediate operand.
- ///
- const MachineInstrBuilder &addImm(int Val) const {
- MI->addZeroExtImmOperand(Val);
+ const MachineInstrBuilder &addFrameIndex(unsigned Idx) const {
+ MI->addOperand(MachineOperand::CreateFI(Idx));
return *this;
}
- /// addSImm - Add a new sign extended immediate operand...
- ///
- const MachineInstrBuilder &addSImm(int val) const {
- MI->addSignExtImmOperand(val);
+ const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
+ int Offset = 0,
+ unsigned char TargetFlags = 0) const {
+ MI->addOperand(MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
return *this;
}
- /// addZImm - Add a new zero extended immediate operand...
- ///
- const MachineInstrBuilder &addZImm(unsigned Val) const {
- MI->addZeroExtImmOperand(Val);
+ const MachineInstrBuilder &addJumpTableIndex(unsigned Idx,
+ unsigned char TargetFlags = 0) const {
+ MI->addOperand(MachineOperand::CreateJTI(Idx, TargetFlags));
return *this;
}
- const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB) const {
- MI->addMachineBasicBlockOperand(MBB);
+ const MachineInstrBuilder &addGlobalAddress(GlobalValue *GV,
+ int64_t Offset = 0,
+ unsigned char TargetFlags = 0) const {
+ MI->addOperand(MachineOperand::CreateGA(GV, Offset, TargetFlags));
return *this;
}
- const MachineInstrBuilder &addFrameIndex(unsigned Idx) const {
- MI->addFrameIndexOperand(Idx);
+ const MachineInstrBuilder &addExternalSymbol(const char *FnName,
+ unsigned char TargetFlags = 0) const {
+ MI->addOperand(MachineOperand::CreateES(FnName, TargetFlags));
return *this;
}
- const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx) const {
- MI->addConstantPoolIndexOperand(Idx);
+ const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
+ MI->addMemOperand(*MI->getParent()->getParent(), MMO);
return *this;
}
- const MachineInstrBuilder &addGlobalAddress(GlobalValue *GV,
- bool isPCRelative = false, int Offset = 0) const {
- MI->addGlobalAddressOperand(GV, isPCRelative, Offset);
+ const MachineInstrBuilder &addOperand(const MachineOperand &MO) const {
+ MI->addOperand(MO);
return *this;
}
- const MachineInstrBuilder &addExternalSymbol(const std::string &Name,
- bool isPCRelative = false) const{
- MI->addExternalSymbolOperand(Name, isPCRelative);
+ const MachineInstrBuilder &addMetadata(MDNode *MD) const {
+ MI->addOperand(MachineOperand::CreateMetadata(MD));
return *this;
}
};
/// BuildMI - Builder interface. Specify how to create the initial instruction
-/// itself. NumOperands is the number of operands to the machine instruction to
-/// allow for memory efficient representation of machine instructions.
+/// itself.
///
-inline MachineInstrBuilder BuildMI(int Opcode, unsigned NumOperands) {
- return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands, true, true));
+inline MachineInstrBuilder BuildMI(MachineFunction &MF,
+ DebugLoc DL,
+ const TargetInstrDesc &TID) {
+ return MachineInstrBuilder(MF.CreateMachineInstr(TID, DL));
}
/// BuildMI - This version of the builder sets up the first operand as a
-/// destination virtual register. NumOperands is the number of additional add*
-/// calls that are expected, not including the destination register.
+/// destination virtual register.
///
-inline MachineInstrBuilder BuildMI(
- int Opcode, unsigned NumOperands,
- unsigned DestReg,
- MachineOperand::UseType useType = MachineOperand::Def) {
- return MachineInstrBuilder(new MachineInstr(Opcode, NumOperands+1,
- true, true)).addReg(DestReg, useType);
+inline MachineInstrBuilder BuildMI(MachineFunction &MF,
+ DebugLoc DL,
+ const TargetInstrDesc &TID,
+ unsigned DestReg) {
+ return MachineInstrBuilder(MF.CreateMachineInstr(TID, DL))
+ .addReg(DestReg, RegState::Define);
}
/// BuildMI - This version of the builder inserts the newly-built
/// instruction before the given position in the given MachineBasicBlock, and
/// sets up the first operand as a destination virtual register.
-/// NumOperands is the number of additional add* calls that are expected,
-/// not including the destination register.
///
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I,
- int Opcode, unsigned NumOperands,
+ DebugLoc DL,
+ const TargetInstrDesc &TID,
unsigned DestReg) {
- MachineInstr *MI = new MachineInstr(Opcode, NumOperands+1, true, true);
+ MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID, DL);
BB.insert(I, MI);
- return MachineInstrBuilder(MI).addReg(DestReg, MachineOperand::Def);
+ return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
}
/// BuildMI - This version of the builder inserts the newly-built
///
inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
MachineBasicBlock::iterator I,
- int Opcode, unsigned NumOperands) {
- MachineInstr *MI = new MachineInstr(Opcode, NumOperands, true, true);
+ DebugLoc DL,
+ const TargetInstrDesc &TID) {
+ MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID, DL);
BB.insert(I, MI);
return MachineInstrBuilder(MI);
}
/// instruction at the end of the given MachineBasicBlock, and does NOT take a
/// destination register.
///
-inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
- unsigned NumOperands) {
- return BuildMI(*BB, BB->end(), Opcode, NumOperands);
+inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
+ DebugLoc DL,
+ const TargetInstrDesc &TID) {
+ return BuildMI(*BB, BB->end(), DL, TID);
}
/// BuildMI - This version of the builder inserts the newly-built
/// instruction at the end of the given MachineBasicBlock, and sets up the first
-/// operand as a destination virtual register. NumOperands is the number of
-/// additional add* calls that are expected, not including the destination
-/// register.
+/// operand as a destination virtual register.
///
-inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB, int Opcode,
- unsigned NumOperands, unsigned DestReg) {
- return BuildMI(*BB, BB->end(), Opcode, NumOperands, DestReg);
+inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
+ DebugLoc DL,
+ const TargetInstrDesc &TID,
+ unsigned DestReg) {
+ return BuildMI(*BB, BB->end(), DL, TID, DestReg);
+}
+
+inline unsigned getDefRegState(bool B) {
+ return B ? RegState::Define : 0;
+}
+inline unsigned getImplRegState(bool B) {
+ return B ? RegState::Implicit : 0;
+}
+inline unsigned getKillRegState(bool B) {
+ return B ? RegState::Kill : 0;
+}
+inline unsigned getDeadRegState(bool B) {
+ return B ? RegState::Dead : 0;
+}
+inline unsigned getUndefRegState(bool B) {
+ return B ? RegState::Undef : 0;
}
} // End llvm namespace
projects / oota-llvm.git / blobdiff