Convert EXTRACT_SUBREG to COPY when emitting machine instrs.
[oota-llvm.git] / include / llvm / CodeGen / MachineInstrBuilder.h
index ffe5fbe0441823c0191794c27fbae294c6b19ed4..37ac24cab841ca1eaf2db20ed16630050dca9de3 100644 (file)
 #ifndef LLVM_CODEGEN_MACHINEINSTRBUILDER_H
 #define LLVM_CODEGEN_MACHINEINSTRBUILDER_H
 
-#include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunction.h"
 
 namespace llvm {
 
 class TargetInstrDesc;
+class MDNode;
+
+namespace RegState {
+  enum {
+    Define         = 0x2,
+    Implicit       = 0x4,
+    Kill           = 0x8,
+    Dead           = 0x10,
+    Undef          = 0x20,
+    EarlyClobber   = 0x40,
+    Debug          = 0x80,
+    ImplicitDefine = Implicit | Define,
+    ImplicitKill   = Implicit | Kill
+  };
+}
 
 class MachineInstrBuilder {
   MachineInstr *MI;
 public:
+  MachineInstrBuilder() : MI(0) {}
   explicit MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
 
   /// Allow automatic conversion to the machine instruction we are working on.
@@ -37,11 +52,19 @@ public:
   /// addReg - Add a new virtual register operand...
   ///
   const
-  MachineInstrBuilder &addReg(unsigned RegNo, bool isDef = false, 
-                              bool isImp = false, bool isKill = false, 
-                              bool isDead = false, unsigned SubReg = 0) const {
-    MI->addOperand(MachineOperand::CreateReg(RegNo, isDef, isImp, isKill,
-                                             isDead, SubReg));
+  MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
+                              unsigned SubReg = 0) const {
+    assert((flags & 0x1) == 0 &&
+           "Passing in 'true' to addReg is forbidden! Use enums instead.");
+    MI->addOperand(MachineOperand::CreateReg(RegNo,
+                                             flags & RegState::Define,
+                                             flags & RegState::Implicit,
+                                             flags & RegState::Kill,
+                                             flags & RegState::Dead,
+                                             flags & RegState::Undef,
+                                             flags & RegState::EarlyClobber,
+                                             SubReg,
+                                             flags & RegState::Debug));
     return *this;
   }
 
@@ -57,8 +80,9 @@ public:
     return *this;
   }
 
-  const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB) const {
-    MI->addOperand(MachineOperand::CreateMBB(MBB));
+  const MachineInstrBuilder &addMBB(MachineBasicBlock *MBB,
+                                    unsigned char TargetFlags = 0) const {
+    MI->addOperand(MachineOperand::CreateMBB(MBB, TargetFlags));
     return *this;
   }
 
@@ -68,49 +92,70 @@ public:
   }
 
   const MachineInstrBuilder &addConstantPoolIndex(unsigned Idx,
-                                                  int Offset = 0) const {
-    MI->addOperand(MachineOperand::CreateCPI(Idx, Offset));
+                                                  int Offset = 0,
+                                          unsigned char TargetFlags = 0) const {
+    MI->addOperand(MachineOperand::CreateCPI(Idx, Offset, TargetFlags));
     return *this;
   }
 
-  const MachineInstrBuilder &addJumpTableIndex(unsigned Idx) const {
-    MI->addOperand(MachineOperand::CreateJTI(Idx));
+  const MachineInstrBuilder &addJumpTableIndex(unsigned Idx,
+                                          unsigned char TargetFlags = 0) const {
+    MI->addOperand(MachineOperand::CreateJTI(Idx, TargetFlags));
     return *this;
   }
 
-  const MachineInstrBuilder &addGlobalAddress(GlobalValue *GV,
-                                              int64_t Offset = 0) const {
-    MI->addOperand(MachineOperand::CreateGA(GV, Offset));
+  const MachineInstrBuilder &addGlobalAddress(const GlobalValue *GV,
+                                              int64_t Offset = 0,
+                                          unsigned char TargetFlags = 0) const {
+    MI->addOperand(MachineOperand::CreateGA(GV, Offset, TargetFlags));
     return *this;
   }
 
   const MachineInstrBuilder &addExternalSymbol(const char *FnName,
-                                               int64_t Offset = 0) const {
-    MI->addOperand(MachineOperand::CreateES(FnName, Offset));
+                                          unsigned char TargetFlags = 0) const {
+    MI->addOperand(MachineOperand::CreateES(FnName, TargetFlags));
     return *this;
   }
 
-  const MachineInstrBuilder &addMemOperand(const MachineMemOperand &MMO) const {
+  const MachineInstrBuilder &addMemOperand(MachineMemOperand *MMO) const {
     MI->addMemOperand(*MI->getParent()->getParent(), MMO);
     return *this;
   }
+
+  const MachineInstrBuilder &addOperand(const MachineOperand &MO) const {
+    MI->addOperand(MO);
+    return *this;
+  }
+
+  const MachineInstrBuilder &addMetadata(const MDNode *MD) const {
+    MI->addOperand(MachineOperand::CreateMetadata(MD));
+    return *this;
+  }
+  
+  const MachineInstrBuilder &addSym(MCSymbol *Sym) const {
+    MI->addOperand(MachineOperand::CreateMCSymbol(Sym));
+    return *this;
+  }
 };
 
 /// BuildMI - Builder interface.  Specify how to create the initial instruction
 /// itself.
 ///
 inline MachineInstrBuilder BuildMI(MachineFunction &MF,
+                                   DebugLoc DL,
                                    const TargetInstrDesc &TID) {
-  return MachineInstrBuilder(MF.CreateMachineInstr(TID));
+  return MachineInstrBuilder(MF.CreateMachineInstr(TID, DL));
 }
 
 /// BuildMI - This version of the builder sets up the first operand as a
 /// destination virtual register.
 ///
-inline MachineInstrBuilder  BuildMI(MachineFunction &MF,
-                                    const TargetInstrDesc &TID,
-                                    unsigned DestReg) {
-  return MachineInstrBuilder(MF.CreateMachineInstr(TID)).addReg(DestReg, true);
+inline MachineInstrBuilder BuildMI(MachineFunction &MF,
+                                   DebugLoc DL,
+                                   const TargetInstrDesc &TID,
+                                   unsigned DestReg) {
+  return MachineInstrBuilder(MF.CreateMachineInstr(TID, DL))
+           .addReg(DestReg, RegState::Define);
 }
 
 /// BuildMI - This version of the builder inserts the newly-built
@@ -119,11 +164,12 @@ inline MachineInstrBuilder  BuildMI(MachineFunction &MF,
 ///
 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
                                    MachineBasicBlock::iterator I,
+                                   DebugLoc DL,
                                    const TargetInstrDesc &TID,
                                    unsigned DestReg) {
-  MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID);
+  MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID, DL);
   BB.insert(I, MI);
-  return MachineInstrBuilder(MI).addReg(DestReg, true);
+  return MachineInstrBuilder(MI).addReg(DestReg, RegState::Define);
 }
 
 /// BuildMI - This version of the builder inserts the newly-built
@@ -132,8 +178,9 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
 ///
 inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
                                    MachineBasicBlock::iterator I,
+                                   DebugLoc DL,
                                    const TargetInstrDesc &TID) {
-  MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID);
+  MachineInstr *MI = BB.getParent()->CreateMachineInstr(TID, DL);
   BB.insert(I, MI);
   return MachineInstrBuilder(MI);
 }
@@ -143,18 +190,36 @@ inline MachineInstrBuilder BuildMI(MachineBasicBlock &BB,
 /// destination register.
 ///
 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
+                                   DebugLoc DL,
                                    const TargetInstrDesc &TID) {
-  return BuildMI(*BB, BB->end(), TID);
+  return BuildMI(*BB, BB->end(), DL, TID);
 }
 
 /// BuildMI - This version of the builder inserts the newly-built
 /// instruction at the end of the given MachineBasicBlock, and sets up the first
-/// operand as a destination virtual register. 
+/// operand as a destination virtual register.
 ///
 inline MachineInstrBuilder BuildMI(MachineBasicBlock *BB,
+                                   DebugLoc DL,
                                    const TargetInstrDesc &TID,
                                    unsigned DestReg) {
-  return BuildMI(*BB, BB->end(), TID, DestReg);
+  return BuildMI(*BB, BB->end(), DL, TID, DestReg);
+}
+
+inline unsigned getDefRegState(bool B) {
+  return B ? RegState::Define : 0;
+}
+inline unsigned getImplRegState(bool B) {
+  return B ? RegState::Implicit : 0;
+}
+inline unsigned getKillRegState(bool B) {
+  return B ? RegState::Kill : 0;
+}
+inline unsigned getDeadRegState(bool B) {
+  return B ? RegState::Dead : 0;
+}
+inline unsigned getUndefRegState(bool B) {
+  return B ? RegState::Undef : 0;
 }
 
 } // End llvm namespace