#include "llvm/ADT/ilist.h"
#include "llvm/ADT/ilist_node.h"
#include "llvm/ADT/STLExtras.h"
+#include "llvm/CodeGen/AsmPrinter.h"
#include "llvm/CodeGen/MachineOperand.h"
-#include "llvm/CodeGen/MachineMemOperand.h"
#include "llvm/Target/TargetInstrDesc.h"
-#include <list>
+#include "llvm/Support/DebugLoc.h"
#include <vector>
namespace llvm {
+class AliasAnalysis;
class TargetInstrDesc;
class TargetInstrInfo;
class TargetRegisterInfo;
class MachineFunction;
+class MachineMemOperand;
//===----------------------------------------------------------------------===//
/// MachineInstr - Representation of each machine instruction.
///
class MachineInstr : public ilist_node<MachineInstr> {
+public:
+ typedef MachineMemOperand **mmo_iterator;
+
+private:
const TargetInstrDesc *TID; // Instruction descriptor.
unsigned short NumImplicitOps; // Number of implicit operands (which
// are determined at construction time).
+ unsigned short AsmPrinterFlags; // Various bits of information used by
+ // the AsmPrinter to emit helpful
+ // comments. This is *not* semantic
+ // information. Do not use this for
+ // anything other than to convey comment
+ // information to AsmPrinter.
+
std::vector<MachineOperand> Operands; // the operands
- std::list<MachineMemOperand> MemOperands; // information on memory references
+ mmo_iterator MemRefs; // information on memory references
+ mmo_iterator MemRefsEnd;
MachineBasicBlock *Parent; // Pointer to the owning basic block.
+ DebugLoc debugLoc; // Source line information.
// OperandComplete - Return true if it's illegal to add a new operand
bool OperandsComplete() const;
// Intrusive list support
friend struct ilist_traits<MachineInstr>;
friend struct ilist_traits<MachineBasicBlock>;
- friend struct ilist_sentinel_traits<MachineInstr>;
void setParent(MachineBasicBlock *P) { Parent = P; }
/// MachineInstr ctor - This constructor creates a copy of the given
/// TID NULL and no operands.
MachineInstr();
+ // The next two constructors have DebugLoc and non-DebugLoc versions;
+ // over time, the non-DebugLoc versions should be phased out and eventually
+ // removed.
+
/// MachineInstr ctor - This constructor create a MachineInstr and add the
/// implicit operands. It reserves space for number of operands specified by
- /// TargetInstrDesc.
+ /// TargetInstrDesc. The version with a DebugLoc should be preferred.
explicit MachineInstr(const TargetInstrDesc &TID, bool NoImp = false);
/// MachineInstr ctor - Work exactly the same as the ctor above, except that
/// the MachineInstr is created and added to the end of the specified basic
- /// block.
+ /// block. The version with a DebugLoc should be preferred.
///
MachineInstr(MachineBasicBlock *MBB, const TargetInstrDesc &TID);
+ /// MachineInstr ctor - This constructor create a MachineInstr and add the
+ /// implicit operands. It reserves space for number of operands specified by
+ /// TargetInstrDesc. An explicit DebugLoc is supplied.
+ explicit MachineInstr(const TargetInstrDesc &TID, const DebugLoc dl,
+ bool NoImp = false);
+
+ /// MachineInstr ctor - Work exactly the same as the ctor above, except that
+ /// the MachineInstr is created and added to the end of the specified basic
+ /// block.
+ ///
+ MachineInstr(MachineBasicBlock *MBB, const DebugLoc dl,
+ const TargetInstrDesc &TID);
+
~MachineInstr();
// MachineInstrs are pool-allocated and owned by MachineFunction.
public:
const MachineBasicBlock* getParent() const { return Parent; }
MachineBasicBlock* getParent() { return Parent; }
+
+ /// getAsmPrinterFlags - Return the asm printer flags bitvector.
+ ///
+ unsigned short getAsmPrinterFlags() const { return AsmPrinterFlags; }
+
+ /// getAsmPrinterFlag - Return whether an AsmPrinter flag is set.
+ ///
+ bool getAsmPrinterFlag(AsmPrinter::CommentFlag Flag) const {
+ return AsmPrinterFlags & Flag;
+ }
+
+ /// setAsmPrinterFlag - Set a flag for the AsmPrinter.
+ ///
+ void setAsmPrinterFlag(unsigned short Flag) {
+ AsmPrinterFlags |= Flag;
+ }
+
+ /// getDebugLoc - Returns the debug location id of this MachineInstr.
+ ///
+ DebugLoc getDebugLoc() const { return debugLoc; }
/// getDesc - Returns the target instruction descriptor of this
/// MachineInstr.
unsigned getNumExplicitOperands() const;
/// Access to memory operands of the instruction
- std::list<MachineMemOperand>::iterator memoperands_begin()
- { return MemOperands.begin(); }
- std::list<MachineMemOperand>::iterator memoperands_end()
- { return MemOperands.end(); }
- std::list<MachineMemOperand>::const_iterator memoperands_begin() const
- { return MemOperands.begin(); }
- std::list<MachineMemOperand>::const_iterator memoperands_end() const
- { return MemOperands.end(); }
- bool memoperands_empty() const { return MemOperands.empty(); }
+ mmo_iterator memoperands_begin() const { return MemRefs; }
+ mmo_iterator memoperands_end() const { return MemRefsEnd; }
+ bool memoperands_empty() const { return MemRefsEnd == MemRefs; }
/// hasOneMemOperand - Return true if this instruction has exactly one
/// MachineMemOperand.
bool hasOneMemOperand() const {
- return !memoperands_empty() &&
- next(memoperands_begin()) == memoperands_end();
+ return MemRefsEnd - MemRefs == 1;
}
/// isIdenticalTo - Return true if this instruction is identical to (same
}
/// findRegisterUseOperandIdx() - Returns the operand index that is a use of
- /// the specific register or -1 if it is not found. It further tightening
+ /// the specific register or -1 if it is not found. It further tightens
/// the search criteria to a use that kills the register if isKill is true.
int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false,
const TargetRegisterInfo *TRI = NULL) const;
/// findRegisterDefOperand - Wrapper for findRegisterDefOperandIdx, it returns
/// a pointer to the MachineOperand rather than an index.
- MachineOperand *findRegisterDefOperand(unsigned Reg,bool isDead = false,
+ MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false,
const TargetRegisterInfo *TRI = NULL) {
int Idx = findRegisterDefOperandIdx(Reg, isDead, TRI);
return (Idx == -1) ? NULL : &getOperand(Idx);
/// none is found.
int findFirstPredOperandIdx() const;
- /// isRegReDefinedByTwoAddr - Given the defined register and the operand index,
- /// check if the register def is a re-definition due to two addr elimination.
- bool isRegReDefinedByTwoAddr(unsigned Reg, unsigned DefIdx) const;
+ /// isRegTiedToUseOperand - Given the index of a register def operand,
+ /// check if the register def is tied to a source operand, due to either
+ /// two-address elimination or inline assembly constraints. Returns the
+ /// first tied use operand index by reference is UseOpIdx is not null.
+ bool isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx = 0) const;
+
+ /// isRegTiedToDefOperand - Return true if the use operand of the specified
+ /// index is tied to an def operand. It also returns the def operand index by
+ /// reference if DefOpIdx is not null.
+ bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx = 0) const;
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
///
bool addRegisterKilled(unsigned IncomingReg,
const TargetRegisterInfo *RegInfo,
bool AddIfNotFound = false);
-
+
/// addRegisterDead - We have determined MI defined a register without a use.
/// Look for the operand that defines it and mark it as IsDead. If
/// AddIfNotFound is true, add a implicit operand if it's not found. Returns
bool addRegisterDead(unsigned IncomingReg, const TargetRegisterInfo *RegInfo,
bool AddIfNotFound = false);
+ /// addRegisterDefined - We have determined MI defines a register. Make sure
+ /// there is an operand defining Reg.
+ void addRegisterDefined(unsigned IncomingReg,
+ const TargetRegisterInfo *RegInfo);
+
/// isSafeToMove - Return true if it is safe to move this instruction. If
/// SawStore is set to true, it means that there is a store (or call) between
/// the instruction's location and its intended destination.
- bool isSafeToMove(const TargetInstrInfo *TII, bool &SawStore);
-
- bool isSafeToReMat(const TargetInstrInfo *TII, unsigned DstReg);
+ bool isSafeToMove(const TargetInstrInfo *TII, bool &SawStore,
+ AliasAnalysis *AA) const;
+
+ /// isSafeToReMat - Return true if it's safe to rematerialize the specified
+ /// instruction which defined the specified register instead of copying it.
+ bool isSafeToReMat(const TargetInstrInfo *TII, unsigned DstReg,
+ AliasAnalysis *AA) const;
+
+ /// hasVolatileMemoryRef - Return true if this instruction may have a
+ /// volatile memory reference, or if the information describing the
+ /// memory reference is not available. Return false if it is known to
+ /// have no volatile memory references.
+ bool hasVolatileMemoryRef() const;
+
+ /// isInvariantLoad - Return true if this instruction is loading from a
+ /// location whose value is invariant across the function. For example,
+ /// loading a value from the constant pool or from from the argument area of
+ /// a function if it does not change. This should only return true of *all*
+ /// loads the instruction does are invariant (if it does multiple loads).
+ bool isInvariantLoad(AliasAnalysis *AA) const;
+
+ /// isConstantValuePHI - If the specified instruction is a PHI that always
+ /// merges together the same virtual register, return the register, otherwise
+ /// return 0.
+ unsigned isConstantValuePHI() const;
//
// Debugging support
//
- void print(std::ostream *OS, const TargetMachine *TM) const {
- if (OS) print(*OS, TM);
- }
- void print(std::ostream &OS, const TargetMachine *TM = 0) const;
- void print(std::ostream *OS) const { if (OS) print(*OS); }
- void print(raw_ostream *OS, const TargetMachine *TM) const {
- if (OS) print(*OS, TM);
- }
void print(raw_ostream &OS, const TargetMachine *TM = 0) const;
- void print(raw_ostream *OS) const { if (OS) print(*OS); }
void dump() const;
//===--------------------------------------------------------------------===//
///
void setDesc(const TargetInstrDesc &tid) { TID = &tid; }
+ /// setDebugLoc - Replace current source information with new such.
+ /// Avoid using this, the constructor argument is preferable.
+ ///
+ void setDebugLoc(const DebugLoc dl) { debugLoc = dl; }
+
/// RemoveOperand - Erase an operand from an instruction, leaving it with one
/// fewer operand than it started with.
///
void RemoveOperand(unsigned i);
- /// addMemOperand - Add a MachineMemOperand to the machine instruction,
- /// referencing arbitrary storage.
- void addMemOperand(MachineFunction &MF,
- const MachineMemOperand &MO);
+ /// addMemOperand - Add a MachineMemOperand to the machine instruction.
+ /// This function should be used only occasionally. The setMemRefs function
+ /// is the primary method for setting up a MachineInstr's MemRefs list.
+ void addMemOperand(MachineFunction &MF, MachineMemOperand *MO);
- /// clearMemOperands - Erase all of this MachineInstr's MachineMemOperands.
- void clearMemOperands(MachineFunction &MF);
+ /// setMemRefs - Assign this MachineInstr's memory reference descriptor
+ /// list. This does not transfer ownership.
+ void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) {
+ MemRefs = NewMemRefs;
+ MemRefsEnd = NewMemRefsEnd;
+ }
private:
/// getRegInfo - If this instruction is embedded into a MachineFunction,
//===----------------------------------------------------------------------===//
// Debugging Support
-inline std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI) {
- MI.print(OS);
- return OS;
-}
-
inline raw_ostream& operator<<(raw_ostream &OS, const MachineInstr &MI) {
MI.print(OS);
return OS;
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