EXTRACT_SUBREG coalescing support. The coalescer now treats EXTRACT_SUBREG like

[oota-llvm.git] / include / llvm / CodeGen / MachineInstr.h

diff --git a/include/llvm/CodeGen/MachineInstr.h b/include/llvm/CodeGen/MachineInstr.h
index a6e14e21fdfe5bef84905c41e3f26c38d5d43dab..beba6923ee7832749f0569aeccb875b61cfb7dd3 100644 (file)
--- a/include/llvm/CodeGen/MachineInstr.h
+++ b/include/llvm/CodeGen/MachineInstr.h
@@ -76,10 +76,6 @@ private:
     /// offset - Offset to address of global or external, only valid for
     /// MO_GlobalAddress, MO_ExternalSym and MO_ConstantPoolIndex
     int offset;
-
-    /// subReg - SubRegister number, only valid for MO_Register.  A value of 0
-    /// indicates the MO_Register has no subReg.
-    unsigned subReg;
   } auxInfo;
   
   MachineOperand() {}
@@ -106,6 +102,18 @@ public:
     return Op;
   }
   
+  static MachineOperand CreateFrameIndex(unsigned Idx) {
+    MachineOperand Op;
+    Op.opType = MachineOperand::MO_FrameIndex;
+    Op.contents.immedVal = Idx;
+    Op.IsDef = false;
+    Op.IsImp = false;
+    Op.IsKill = false;
+    Op.IsDead = false;
+    Op.auxInfo.offset = 0;
+    return Op;
+  }
+
   const MachineOperand &operator=(const MachineOperand &MO) {
     contents = MO.contents;
     IsDef    = MO.IsDef;
@@ -123,10 +131,6 @@ public:
 
   /// Accessors that tell you what kind of MachineOperand you're looking at.
   ///
-  bool isReg() const { return opType == MO_Register; }
-  bool isImm() const { return opType == MO_Immediate; }
-  bool isMBB() const { return opType == MO_MachineBasicBlock; }
-  
   bool isRegister() const { return opType == MO_Register; }
   bool isImmediate() const { return opType == MO_Immediate; }
   bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
@@ -137,12 +141,12 @@ public:
   bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
 
   int64_t getImm() const {
-    assert(isImm() && "Wrong MachineOperand accessor");
+    assert(isImmediate() && "Wrong MachineOperand accessor");
     return contents.immedVal;
   }
   
   int64_t getImmedValue() const {
-    assert(isImm() && "Wrong MachineOperand accessor");
+    assert(isImmediate() && "Wrong MachineOperand accessor");
     return contents.immedVal;
   }
   MachineBasicBlock *getMBB() const {
@@ -178,10 +182,6 @@ public:
         "Wrong MachineOperand accessor");
     return auxInfo.offset;
   }
-  unsigned getSubReg() const {
-    assert(isRegister() && "Wrong MachineOperand accessor");
-    return auxInfo.subReg;
-  }
   const char *getSymbolName() const {
     assert(isExternalSymbol() && "Wrong MachineOperand accessor");
     return contents.SymbolName;
@@ -253,11 +253,11 @@ public:
   }
 
   void setImmedValue(int64_t immVal) {
-    assert(isImm() && "Wrong MachineOperand mutator");
+    assert(isImmediate() && "Wrong MachineOperand mutator");
     contents.immedVal = immVal;
   }
   void setImm(int64_t immVal) {
-    assert(isImm() && "Wrong MachineOperand mutator");
+    assert(isImmediate() && "Wrong MachineOperand mutator");
     contents.immedVal = immVal;
   }
 
@@ -267,10 +267,6 @@ public:
         "Wrong MachineOperand accessor");
     auxInfo.offset = Offset;
   }
-  void setSubReg(unsigned subReg) {
-    assert(isRegister() && "Wrong MachineOperand accessor");
-    auxInfo.subReg = subReg;
-  }
   void setConstantPoolIndex(unsigned Idx) {
     assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
     contents.immedVal = Idx;
@@ -344,7 +340,7 @@ public:
   /// MachineInstr ctor - This constructor create a MachineInstr and add the
   /// implicit operands. It reserves space for number of operands specified by
   /// TargetInstrDescriptor.
-  MachineInstr(const TargetInstrDescriptor &TID);
+  explicit MachineInstr(const TargetInstrDescriptor &TID);
 
   /// MachineInstr ctor - Work exactly the same as the ctor above, except that
   /// the MachineInstr is created and added to the end of the specified basic
@@ -363,7 +359,7 @@ public:
 
   /// getOpcode - Returns the opcode of this MachineInstr.
   ///
-  const int getOpcode() const;
+  int getOpcode() const;
 
   /// Access to explicit operands of the instruction.
   ///
@@ -378,6 +374,9 @@ public:
     return Operands[i];
   }
 
+  /// getNumExplicitOperands - Returns the number of non-implicit operands.
+  ///
+  unsigned getNumExplicitOperands() const;
   
   /// isIdenticalTo - Return true if this instruction is identical to (same
   /// opcode and same operands as) the specified instruction.
@@ -408,16 +407,28 @@ public:
   /// findRegisterUseOperandIdx() - Returns the operand index that is a use of
   /// the specific register or -1 if it is not found. It further tightening
   /// the search criteria to a use that kills the register if isKill is true.
-  int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false);
+  int findRegisterUseOperandIdx(unsigned Reg, bool isKill = false) const;
   
   /// findRegisterDefOperand() - Returns the MachineOperand that is a def of
   /// the specific register or NULL if it is not found.
   MachineOperand *findRegisterDefOperand(unsigned Reg);
+
+  /// findFirstPredOperandIdx() - Find the index of the first operand in the
+  /// operand list that is used to represent the predicate. It returns -1 if
+  /// none is found.
+  int findFirstPredOperandIdx() const;
   
+  /// isRegReDefinedByTwoAddr - Returns true if the Reg re-definition is due
+  /// to two addr elimination.
+  bool isRegReDefinedByTwoAddr(unsigned Reg) const;
+
   /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
   ///
   void copyKillDeadInfo(const MachineInstr *MI);
 
+  /// copyPredicates - Copies predicate operand(s) from MI.
+  void copyPredicates(const MachineInstr *MI);
+
   //
   // Debugging support
   //
@@ -448,7 +459,6 @@ public:
     Op.IsKill = IsKill;
     Op.IsDead = IsDead;
     Op.contents.RegNo = Reg;
-    Op.auxInfo.subReg = 0;
   }
 
   /// addImmOperand - Add a zero extended constant argument to the