//
// The LLVM Compiler Infrastructure
//
-// This file was developed by the LLVM research group and is distributed under
-// the University of Illinois Open Source License. See LICENSE.TXT for details.
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
-// This file implements the LiveVariable analysis pass. For each machine
+// This file implements the LiveVariables analysis pass. For each machine
// instruction in the function, this pass calculates the set of registers that
// are immediately dead after the instruction (i.e., the instruction calculates
// the value, but it is never used) and the set of registers that are used by
// the instruction, but are never used after the instruction (i.e., they are
// killed).
//
-// This class computes live variables using are sparse implementation based on
+// This class computes live variables using a sparse implementation based on
// the machine code SSA form. This class computes live variable information for
// each virtual and _register allocatable_ physical register in a function. It
// uses the dominance properties of SSA form to efficiently compute live
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/ADT/BitVector.h"
-#include <map>
+#include "llvm/ADT/DenseMap.h"
+#include "llvm/ADT/SmallSet.h"
+#include "llvm/ADT/SmallVector.h"
namespace llvm {
-class MRegisterInfo;
-class BitVector;
+class MachineRegisterInfo;
+class TargetRegisterInfo;
class LiveVariables : public MachineFunctionPass {
public:
+ static char ID; // Pass identification, replacement for typeid
+ LiveVariables() : MachineFunctionPass((intptr_t)&ID) {}
+
/// VarInfo - This represents the regions where a virtual register is live in
/// the program. We represent this with three different pieces of
/// information: the instruction that uniquely defines the value, the set of
///
BitVector AliveBlocks;
+ /// UsedBlocks - Set of blocks of which this value is actually used. This
+ /// is a bit set which uses the basic block number as an index.
+ BitVector UsedBlocks;
+
+ /// NumUses - Number of uses of this register across the entire function.
+ ///
+ unsigned NumUses;
+
/// Kills - List of MachineInstruction's which are the last use of this
/// virtual register (kill it) in their basic block.
///
std::vector<MachineInstr*> Kills;
- VarInfo() : DefInst(0) {}
+ VarInfo() : DefInst(0), NumUses(0) {}
/// removeKill - Delete a kill corresponding to the specified
/// machine instruction. Returns true if there was a kill
/// corresponding to this instruction, false otherwise.
bool removeKill(MachineInstr *MI) {
- for (std::vector<MachineInstr*>::iterator i = Kills.begin(),
- e = Kills.end(); i != e; ++i)
- if (*i == MI) {
- Kills.erase(i);
- return true;
- }
- return false;
+ std::vector<MachineInstr*>::iterator
+ I = std::find(Kills.begin(), Kills.end(), MI);
+ if (I == Kills.end())
+ return false;
+ Kills.erase(I);
+ return true;
}
void dump() const;
BitVector ReservedRegisters;
private: // Intermediate data structures
- const MRegisterInfo *RegInfo;
+ MachineFunction *MF;
+
+ MachineRegisterInfo* MRI;
- MachineInstr **PhysRegInfo;
- bool *PhysRegUsed;
+ const TargetRegisterInfo *TRI;
- typedef std::map<const MachineBasicBlock*,
- std::vector<unsigned> > PHIVarInfoMap;
+ // PhysRegInfo - Keep track of which instruction was the last def of a
+ // physical register. This is a purely local property, because all physical
+ // register references are presumed dead across basic blocks.
+ MachineInstr **PhysRegDef;
- PHIVarInfoMap PHIVarInfo;
+ // PhysRegInfo - Keep track of which instruction was the last use of a
+ // physical register. This is a purely local property, because all physical
+ // register references are presumed dead across basic blocks.
+ MachineInstr **PhysRegUse;
+ SmallVector<unsigned, 4> *PHIVarInfo;
- /// addRegisterKilled - We have determined MI kills a register. Look for the
- /// operand that uses it and mark it as IsKill.
- void addRegisterKilled(unsigned IncomingReg, MachineInstr *MI);
+ // DistanceMap - Keep track the distance of a MI from the start of the
+ // current basic block.
+ DenseMap<MachineInstr*, unsigned> DistanceMap;
- /// addRegisterDead - We have determined MI defined a register without a use.
- /// Look for the operand that defines it and mark it as IsDead.
- void addRegisterDead(unsigned IncomingReg, MachineInstr *MI);
+ /// HandlePhysRegKill - Add kills of Reg and its sub-registers to the
+ /// uses. Pay special attention to the sub-register uses which may come below
+ /// the last use of the whole register.
+ bool HandlePhysRegKill(unsigned Reg);
void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
void HandlePhysRegDef(unsigned Reg, MachineInstr *MI);
+ /// FindLastPartialDef - Return the last partial def of the specified register.
+ /// Also returns the sub-register that's defined.
+ MachineInstr *FindLastPartialDef(unsigned Reg, unsigned &PartDefReg);
+
+ /// hasRegisterUseBelow - Return true if the specified register is used after
+ /// the current instruction and before it's next definition.
+ bool hasRegisterUseBelow(unsigned Reg, MachineBasicBlock::iterator I,
+ MachineBasicBlock *MBB);
+
/// analyzePHINodes - Gather information about the PHI nodes in here. In
/// particular, we want to map the variable information of a virtual
/// register which is used in a PHI node. We map that to the BB the vreg
virtual bool runOnMachineFunction(MachineFunction &MF);
- /// KillsRegister - Return true if the specified instruction kills the
- /// specified register.
- bool KillsRegister(MachineInstr *MI, unsigned Reg) const;
-
/// RegisterDefIsDead - Return true if the specified instruction defines the
/// specified register, but that definition is dead.
bool RegisterDefIsDead(MachineInstr *MI, unsigned Reg) const;
- /// ModifiesRegister - Return true if the specified instruction modifies the
- /// specified register.
- bool ModifiesRegister(MachineInstr *MI, unsigned Reg) const;
-
//===--------------------------------------------------------------------===//
// API to update live variable information
/// addVirtualRegisterKilled - Add information about the fact that the
/// specified register is killed after being used by the specified
- /// instruction.
- ///
- void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI) {
- addRegisterKilled(IncomingReg, MI);
- getVarInfo(IncomingReg).Kills.push_back(MI);
- }
+ /// instruction. If AddIfNotFound is true, add a implicit operand if it's
+ /// not found.
+ void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI,
+ bool AddIfNotFound = false) {
+ if (MI->addRegisterKilled(IncomingReg, TRI, AddIfNotFound))
+ getVarInfo(IncomingReg).Kills.push_back(MI);
+ }
/// removeVirtualRegisterKilled - Remove the specified virtual
/// register from the live variable information. Returns true if the
bool Removed = false;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
- if (MO.isReg() && MO.isUse() && MO.getReg() == reg) {
- MO.unsetIsKill();
+ if (MO.isRegister() && MO.isKill() && MO.getReg() == reg) {
+ MO.setIsKill(false);
Removed = true;
break;
}
/// removeVirtualRegistersKilled - Remove all killed info for the specified
/// instruction.
void removeVirtualRegistersKilled(MachineInstr *MI);
-
+
/// addVirtualRegisterDead - Add information about the fact that the specified
- /// register is dead after being used by the specified instruction.
- ///
- void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI) {
- addRegisterDead(IncomingReg, MI);
- getVarInfo(IncomingReg).Kills.push_back(MI);
+ /// register is dead after being used by the specified instruction. If
+ /// AddIfNotFound is true, add a implicit operand if it's not found.
+ void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI,
+ bool AddIfNotFound = false) {
+ if (MI->addRegisterDead(IncomingReg, TRI, AddIfNotFound))
+ getVarInfo(IncomingReg).Kills.push_back(MI);
}
/// removeVirtualRegisterDead - Remove the specified virtual
bool Removed = false;
for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
MachineOperand &MO = MI->getOperand(i);
- if (MO.isReg() && MO.isDef() && MO.getReg() == reg) {
- MO.unsetIsDead();
+ if (MO.isRegister() && MO.isDef() && MO.getReg() == reg) {
+ MO.setIsDead(false);
Removed = true;
break;
}
/// register.
VarInfo &getVarInfo(unsigned RegIdx);
- void MarkVirtRegAliveInBlock(VarInfo &VRInfo, MachineBasicBlock *BB);
- void HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
+ void MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock* DefBlock,
+ MachineBasicBlock *BB);
+ void MarkVirtRegAliveInBlock(VarInfo& VRInfo, MachineBasicBlock* DefBlock,
+ MachineBasicBlock *BB,
+ std::vector<MachineBasicBlock*> &WorkList);
+ void HandleVirtRegUse(unsigned reg, MachineBasicBlock *MBB,
MachineInstr *MI);
};
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